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a virtual method of SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59667 91177308-0d34-0410-b5e6-96231b3b80d8
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dump in terms of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59665 91177308-0d34-0410-b5e6-96231b3b80d8
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print in the correct order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59567 91177308-0d34-0410-b5e6-96231b3b80d8
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consistent with ScheduleNodeTopDown methods.
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and FP_ROUND. Not sure what these were doing
here - probably they were sometimes (wrongly)
created with integer operands somewhere that
has since been fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59548 91177308-0d34-0410-b5e6-96231b3b80d8
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supposed to be any functionality change.
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SCALAR_TO_VECTOR. I didn't add the testcase, because
once llc gets past scalar-to-vector it hits a SPU target
lowering bug and explodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59530 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59519 91177308-0d34-0410-b5e6-96231b3b80d8
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when softening FNEG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59513 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59489 91177308-0d34-0410-b5e6-96231b3b80d8
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a SelectionDAG*.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59488 91177308-0d34-0410-b5e6-96231b3b80d8
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Running /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/dg.exp ...
FAIL: /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll
Failed with signal(SIGABRT) at line 1
while running: llvm-as < /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll | llc -march=xcore > fneg.ll.tmp1.s
Assertion failed: (VT.isFloatingPoint() && "Cannot create integer FP constant!"), function getConstantFP, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/SelectionDAG.cpp, line 913.
0 llc 0x0092115c _ZN4llvm3sys18RemoveFileOnSignalERKNS0_4PathEPSs + 844
1 libSystem.B.dylib 0x9217809b _sigtramp + 43
2 ??? 0xffffffff 0x0 + 4294967295
3 libSystem.B.dylib 0x921f0ec2 raise + 26
4 libSystem.B.dylib 0x9220047f abort + 73
5 libSystem.B.dylib 0x921f2063 __assert_rtn + 101
6 llc 0x005a5b0a _ZN4llvm12SelectionDAG13getConmake[1]: *** [check-local] Error 1
make: *** [check] Error 2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59487 91177308-0d34-0410-b5e6-96231b3b80d8
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new CycleBound value. Instead, just update CycleBound on each call.
Also, make ReleasePred and ReleaseSucc methods more consistent accross
the various schedulers.
This also happens to make ScheduleDAGRRList's CycleBound computation
somewhat more interesting, though it still doesn't have any noticeable
effect, because no current targets that use the register-pressure
reduction scheduler provide pipeline models.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59475 91177308-0d34-0410-b5e6-96231b3b80d8
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functions in these two schedulers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59465 91177308-0d34-0410-b5e6-96231b3b80d8
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patch by Richard Osborne, tweaked and extended by your humble
servant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59464 91177308-0d34-0410-b5e6-96231b3b80d8
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a side-car datastructure
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for the target. This fixes PR3080.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59450 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59445 91177308-0d34-0410-b5e6-96231b3b80d8
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can extract using different indexes for two vectors. Added a few tests
for vector shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59399 91177308-0d34-0410-b5e6-96231b3b80d8
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use SHUFFLE_VECTOR instead. If not practical, fall back
to the old scheme of building the split result by hand
using a BUILD_VECTOR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59361 91177308-0d34-0410-b5e6-96231b3b80d8
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and when loading/storing a widen vector, make sure that they are loaded
and stored in consecutive order.
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fairly conservative; it doesn't do alias-analysis queries and it doesn't
attempt to break anti-dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59324 91177308-0d34-0410-b5e6-96231b3b80d8
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before re-inserting them.
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the current function on its own, rather than relying on the SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59277 91177308-0d34-0410-b5e6-96231b3b80d8
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to carry a SmallVector of flagged nodes, just calculate the flagged nodes
dynamically when they are needed.
The local-liveness change is due to a trivial scheduling change where
the scheduler arbitrary decision differently.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59264 91177308-0d34-0410-b5e6-96231b3b80d8
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for the possibility of scheduling without a SelectionDAG being present.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59263 91177308-0d34-0410-b5e6-96231b3b80d8
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special-purpose hook to a new pass. Also, add check to see if any
x87 virtual registers are used, to avoid doing any work in the
common case that no x87 code is needed.
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that it no longer handles non-power-of-two vectors.
However it previously only handled them sometimes,
depending on obscure numerical relationships between
the index and vector type. For example, for a vector
of length 6, it would succeed if and only if the
index was an even multiple of 6. I consider this
more confusing than useful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59122 91177308-0d34-0410-b5e6-96231b3b80d8
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when the target does not support ADDC/SUBC. This
fixes PR3044.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59120 91177308-0d34-0410-b5e6-96231b3b80d8
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Reenable test.
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before creating the SUnit for the operation that it was unfolded from. This
allows each SUnit to have all of its predecessor SUnits available at the time
it is created. I don't know yet if this will be absolutely required, but it
is a little tidier to do it this way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59083 91177308-0d34-0410-b5e6-96231b3b80d8
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TargetLoweringInfo variables for the scheduler.
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argument instead of taking the SelectionDAG's TargetMachine. This is
needed for some upcoming scheduler changes.
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The CC was changed, but wasn't checked to see if it was legal if the DAG
combiner was being run after legalization. Threw in a couple of checks just to
make sure that it's okay. As far as the PR is concerned, no back-end target
actually exhibited this problem, so there isn't an associated testcase.
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bootstrap:
Comparing stages 2 and 3
warning: ./cc1-checksum.o differs
warning: ./cc1obj-checksum.o differs
warning: ./cc1objplus-checksum.o differs
warning: ./cc1plus-checksum.o differs
Bootstrap comparison failure!
./alias.o differs
./alloc-pool.o differs
./attribs.o differs
./bb-reorder.o differs
./bitmap.o differs
./build/errors.o differs
./build/genattrtab.o differs
./build/genautomata.o differs
./build/genemit.o differs
./build/genextract.o differs
...
-bw
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support targets that support these conversions. Users should avoid using
this node as the current targets don't generating code for it.
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