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2012-10-24Delete a directory that wasn't supposed to be checked in yet.Micah Villmow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166591 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-24Add in support for getIntPtrType to get the pointer type based on the ↵Micah Villmow
address space. This checkin also adds in some tests that utilize these paths and updates some of the clients. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166578 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-24Teach DAG combine to fold (buildvec (Xint2fp x)) to (Xint2fp (buildvec x))Michael Liao
- If more than 1 elemennts are defined and target supports the vectorized conversion, use the vectorized one instead to reduce the strength on conversion operation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166546 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-24Keep coding standard. Don't evaluate getNumOperands() every time.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166531 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-23Clean up code and put transformation on (build_vec (ext x)) into a helper funcMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166519 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-23Make the indirect branch optimization deterministic. No functionality change.Nadav Rotem
Patch by Daniel Reynaud. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166501 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-23Merge commit '92b0d8cf2c51debc7f4fb30a417ae839077a8ed0'Derek Schuff
Conflicts: lib/Target/ARM/ARMISelLowering.cpp lib/Target/Mips/MipsISelLowering.h lib/Target/X86/X86ISelLowering.h lib/Target/X86/X86TargetMachine.h tools/llc/llc.cpp The only interesting conflict was ARMISelLowering, caused by http://llvm.org/viewvc/llvm-project?view=rev&revision=166273 which actually removes a LOCALMOD for ARM byval lowering.
2012-10-20Symbol hygiene: Make sure declarations and definitions match, make helper ↵Benjamin Kramer
functions static. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166376 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-191. Remove noreturn attribute from __builtin_debugtrap().Shuxin Yang
(The change at Clang side was committed in r166345) 2. Cosmetic change in order to conform to coding standards. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166350 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-19This patch is to fix radar://8426430. It is about llvm support of ↵Shuxin Yang
__builtin_debugtrap() which is supposed to consistently raise SIGTRAP across all systems. In contrast, __builtin_trap() behave differently on different systems. e.g. it raises SIGTRAP on ARM, and SIGILL on X86. The purpose of __builtin_debugtrap() is to consistently provide "trap" functionality, in the mean time preserve the compatibility with on gcc on __builtin_trap(). The X86 backend is already able to handle debugtrap(). This patch is to: 1) make front-end recognize "__builtin_debugtrap()" (emboddied in the one-line change to Clang). 2) In DAG legalization phase, by default, "debugtrap" will be replaced with "trap", which make the __builtin_debugtrap() "available" to all existing ports without the hassle of changing their code. 3) If trap-function is specified (via -trap-func=xyz to llc), both __builtin_debugtrap() and __builtin_trap() will be expanded into the function call of the specified trap function. This behavior may need change in the future. The provided testing-case is to make sure 2) and 3) are working for ARM port, and we already have a testing case for x86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166300 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-19Simplify condition checking as CONCAT assume all inputs of the same type.Michael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166260 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-18Merge commit '3298959540ca744ec16b4c65db244534a929a862'Derek Schuff
Conflicts: lib/Target/X86/X86TargetMachine.h tools/llc/llc.cpp
2012-10-18In SimplifySelectOps we pulled two loads through a select node despite the ↵Nadav Rotem
fact that one was dependent on the other. rdar://12513091 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166196 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Revert part of r166049 back and enable test case in r166125.Michael Liao
- Folding (trunc (concat ... X )) to (concat ... (trunc X) ...) is valid when '...' are all 'undef's. - r166125 relies on this transformation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166155 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Revert r166049Michael Liao
- In general, it's unsafe for this transformation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166135 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Teach DAG combine to fold (extract_subvec (concat v1, ..) i) to v_iMichael Liao
- If the extracted vector has the same type of all vectored being concatenated together, it should be simplified directly into v_i, where i is the index of the element being extracted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166125 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Add a really faster pre-RA scheduler (-pre-RA-sched=linearize). It doesn't useEvan Cheng
any scheduling heuristics nor does it build up any scheduling data structure that other heuristics use. It essentially linearize by doing a DFA walk but it does handle glues correctly. IMPORTANT: it probably can't handle all the physical register dependencies so it's not suitable for x86. It also doesn't deal with dbg_value nodes right now so it's definitely is still WIP. rdar://12474515 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166122 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Merge commit '320db3f8052c9f506d9ea043ba5da534df40aa08'Derek Schuff
2012-10-16Teach DAG combine to fold (trunc (fptoXi x)) to (fptoXi x)Michael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166049 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-15Freeze the reserved registers as soon as isel is complete.Jakob Stoklund Olesen
Also provide an MRI::getReservedRegs() function to access the frozen register set, and isReserved() and isAllocatable() methods to test individual registers. The various implementations of TRI::getReservedRegs() are quite complicated, and many passes need to look at the reserved register set. This patch makes it possible for these passes to use the cached copy in MRI, avoiding a lot of malloc traffic and repeated calculations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165982 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-15Merge commit 'bb20b24224734f5369d124181d086703ca439dd7'Derek Schuff
Conflicts: lib/Target/X86/X86FrameLowering.cpp lib/Target/X86/X86ISelLowering.cpp
2012-10-15Resubmit the changes to llvm core to update the functions to support ↵Micah Villmow
different pointer sizes on a per address space basis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165941 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-12Merge commit '40573998821fde7ffeabe8507f4c9e8c7cf762f6'Derek Schuff
Conflicts: include/llvm/MC/MCAssembler.h lib/Target/ARM/ARMISelLowering.cpp lib/Target/X86/X86TargetMachine.h tools/llc/llc.cpp
2012-10-12Fix big-endian codegen bug in DAGTypeLegalizer::ExpandRes_BITCASTUlrich Weigand
On PowerPC, a bitcast of <16 x i8> to i128 may run through a code path in ExpandRes_BITCAST that attempts to do an intermediate bitcast to a <4 x i32> vector, and then construct the Hi and Lo parts of the resulting i128 by pairing up two of those i32 vector elements each. The code already recognizes that on a big-endian system, the first two vector elements form the Hi part, and the final two vector elements form the Lo part (vice-versa from the little-endian situation). However, we also need to take endianness into account when forming each of those separate pairs: on a big-endian system, vector element 0 is the *high* part of the pair making up the Hi part of the result, and vector element 1 is the low part of the pair. The code currently always uses vector element 0 as the low part and vector element 1 as the high part, as is appropriate for little-endian platforms only. This patch fixes this by swapping the vector elements as they are paired up as appropriate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165802 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-12Legalizer optimize a pair of div / mod to a call to divrem libcall if they areEvan Cheng
not legal. However, it should use a div instruction + mul + sub if divide is legal. The rem legalization code was missing a check and incorrectly uses a divrem libcall even when div is legal. rdar://12481395 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165778 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-11Merge commit '2fa8af224ea026f9432e833fd6f42a216423a010'Derek Schuff
Conflicts: lib/ExecutionEngine/JIT/JITEmitter.cpp lib/MC/MCELFStreamer.cpp lib/Target/ARM/ARMAsmPrinter.h lib/Target/X86/X86RegisterInfo.td lib/Target/X86/X86TargetMachine.cpp tools/llc/llc.cpp
2012-10-11Revert 165732 for further review.Micah Villmow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165747 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-11Add in the first iteration of support for llvm/clang/lldb to allow variable ↵Micah Villmow
per address space pointer sizes to be optimized correctly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165726 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-11Follow the same routine to add target float expansion hookMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165707 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10Add in support for expansion of all of the comparison operations to the ↵Micah Villmow
absolute minimum required set. This allows a backend to expand any arbitrary set of comparisons as long as a minimum set is supported. The minimum set of required instructions is ISD::AND, ISD::OR, ISD::SETO(or ISD::SETOEQ) and ISD::SETUO(or ISD::SETUNE). Everything is expanded into one of two patterns: Pattern 1: (LHS CC1 RHS) Opc (LHS CC2 RHS) Pattern 2: (LHS CC1 LHS) Opc (RHS CC2 RHS) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165655 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10Add alternative support for FP_ROUND from v2f32 to v2f64Michael Liao
- Due to the current matching vector elements constraints in ISD::FP_EXTEND, rounding from v2f32 to v2f64 is scalarized. Add a customized v2f32 widening to convert it into a target-specific X86ISD::VFPEXT to work around this constraints. This patch also reverts a previous attempt to fix this issue by recovering the scalarized ISD::FP_EXTEND pattern and thus significantly reduces the overhead of supporting non-power-2 vector FP extend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165625 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10Issue description:Stepan Dyatkovskiy
SchedulerDAGInstrs::buildSchedGraph ignores dependencies between FixedStack objects and byval parameters. So loading byval parameters from stack may be inserted *before* it will be stored, since these operations are treated as independent. Fix: Currently ARMTargetLowering::LowerFormalArguments saves byval registers with FixedStack MachinePointerInfo. To fix the problem we need to store byval registers with MachinePointerInfo referenced to first the "byval" parameter. Also commit adds two new fields to the InputArg structure: Function's argument index and InputArg's part offset in bytes relative to the start position of Function's argument. E.g.: If function's argument is 128 bit width and it was splitted onto 32 bit regs, then we got 4 InputArg structs with same arg index, but different offset values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165616 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-09Use the attribute enums to query if a parameter has an attribute.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165550 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-09Add in the first step of the multiple pointer support. This adds in support ↵Micah Villmow
to the data layout for specifying a per address space pointer size. The next step is to update the optimizers to allow them to optimize the different address spaces with this information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165505 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-09Create enums for the different attributes.Bill Wendling
We use the enums to query whether an Attributes object has that attribute. The opaque layer is responsible for knowing where that specific attribute is stored. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165488 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-08Refactor the AddrMode class out of TLI to its own header file.Nadav Rotem
This class is used by LSR and a number of places in the codegen. This is the first step in de-coupling LSR from TLI, and creating a new interface in between them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165455 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-08misched: remove forceUnitLatencies. Defaults are handled by the default ↵Andrew Trick
SchedModel git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165417 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-08Move TargetData to DataLayout.Micah Villmow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165402 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-05Remove unused but set variable flagged by GCC.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165331 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-05Simplify code, don't or a bool with an uint64_t.Benjamin Kramer
No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165321 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04When merging connsecutive stores, use vectors to store the constant zero.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165267 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03Update to use the predicate methods to query if an attribute exists.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165163 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03Fix a cycle in the DAG. In this code we replace multiple loads with a single ↵Nadav Rotem
load and multiple stores with a single load. We create the wide loads and stores (and their chains) before we remove the scalar loads and stores and fix the DAG chain. We attempted to merge loads with a different chain. When that happened, the assumption that it is safe to RAUW broke and a cycle was introduced. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165148 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03A DAGCombine optimization for mergeing consecutive stores to memory. The ↵Nadav Rotem
optimization is not profitable in many cases because modern processors perform multiple stores in parallel and merging stores prior to merging requires extra work. We handle two main cases: 1. Store of multiple consecutive constants: q->a = 3; q->4 = 5; In this case we store a single legal wide integer. 2. Store of multiple consecutive loads: int a = p->a; int b = p->b; q->a = a; q->b = b; In this case we load/store either ilegal vector registers or legal wide integer registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165125 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03Revert 165051-165049 while looking into the foreach.m failure inEric Christopher
more detail. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165099 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02Remove the SavePoint infrastructure from fast isel, replaceEric Christopher
with just an insert point from the MachineBasicBlock and let the location be updated as we access it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165049 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02Fix PR13991: legalizing an overflowing multiplication operation is harder thanDuncan Sands
the add/sub case since in the case of multiplication you also have to check that the operation in the larger type did not overflow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165017 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-01Merge commit '72f0976c1b91c7ba50dce4d0ad0289dc14d37f81'Derek Schuff
Conflicts: lib/Target/ARM/ARMISelDAGToDAG.cpp lib/Target/Mips/MipsISelLowering.cpp lib/Target/Mips/MipsSubtarget.cpp
2012-09-30Use dyn_cast instead of isa and cast.Jakub Staszak
No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164924 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-30Revert r164910 because it causes failures to several phase2 builds.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164911 91177308-0d34-0410-b5e6-96231b3b80d8
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