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Don't replace the old DbgInfo with a new one when clear() on the
old one is sufficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106283 91177308-0d34-0410-b5e6-96231b3b80d8
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SDNode *, since it doesn't care about the ResNo value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106278 91177308-0d34-0410-b5e6-96231b3b80d8
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which is faster, simpler, and less surprising.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106263 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106256 91177308-0d34-0410-b5e6-96231b3b80d8
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addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.
This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106243 91177308-0d34-0410-b5e6-96231b3b80d8
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for correctness' sake, it should be there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106229 91177308-0d34-0410-b5e6-96231b3b80d8
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for the moment. The implementation of the libcall will follow.
Currently, the llvm-gcc knows when the intrinsics can be correctly handled by
the back end and only generates them in those cases, issuing libcalls directly
otherwise. That's too much coupling. The intrinsics should always be
generated and the back end decide how to handle them, be it with a libcall,
inline code, or whatever. This patch is a step in that direction.
rdar://8097623
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106227 91177308-0d34-0410-b5e6-96231b3b80d8
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sets the legalize action to Expand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106203 91177308-0d34-0410-b5e6-96231b3b80d8
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Putkinen!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105775 91177308-0d34-0410-b5e6-96231b3b80d8
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This is a bit of a hack to make inline asm look more like call instructions.
It would be better to produce correct dead flags during isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105749 91177308-0d34-0410-b5e6-96231b3b80d8
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replace an OpA with a widened OpB, it is possible to get new uses of OpA due to CSE
when recursively updating nodes. Since OpA has been processed, the new uses are
not examined again. The patch checks if this occurred and it it did, updates the
new uses of OpA to use OpB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105453 91177308-0d34-0410-b5e6-96231b3b80d8
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needs to demand the high bits because it's asserting that they're zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105406 91177308-0d34-0410-b5e6-96231b3b80d8
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expansion is the same as that used by LegalizeDAG.
The resulting code sucks in terms of performance/codesize on x86-32 for a
64-bit operation; I haven't looked into whether different expansions might be
better in general.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105378 91177308-0d34-0410-b5e6-96231b3b80d8
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Radar 7927666.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105285 91177308-0d34-0410-b5e6-96231b3b80d8
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that are too large. This causes the freebsd bootloader to be too
large apparently.
It's unclear if this should be an -Os or -Oz thing. Thoughts welcome.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105226 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105168 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105105 91177308-0d34-0410-b5e6-96231b3b80d8
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shouldn't have a TargetLoweringInfo member. And FunctionLoweringInfo::set
doesn't needs its EnableFastISel argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105101 91177308-0d34-0410-b5e6-96231b3b80d8
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just return zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105061 91177308-0d34-0410-b5e6-96231b3b80d8
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This will help reduce the amount of casting required on 64-bit targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104911 91177308-0d34-0410-b5e6-96231b3b80d8
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an alloca() or an llvm.stackrestore(). rdar://8031573
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usual suspects that could "return twice".
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ISD::. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104734 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104732 91177308-0d34-0410-b5e6-96231b3b80d8
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more than just the stack slot coloring algorithm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104722 91177308-0d34-0410-b5e6-96231b3b80d8
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implementing pop with a linear search for a "best" element. The priority
queue was a neat idea, but in practice the comparison functions depend
on dynamic information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104718 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104716 91177308-0d34-0410-b5e6-96231b3b80d8
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base class, since all the implementations are the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104659 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104657 91177308-0d34-0410-b5e6-96231b3b80d8
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machine code generation. That's a good idea, so I made it so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104655 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104645 91177308-0d34-0410-b5e6-96231b3b80d8
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Mon Ping provided; unfortunately bugpoint failed to
reduce it, but I think it's important to have a test for
this in the suite. 8023512.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104624 91177308-0d34-0410-b5e6-96231b3b80d8
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(oye, a word which should be better known to people writing tree
traversals, means grandchild.)
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Followups: docs patch for the builtin and eh.sjlj.setjmp cleanup to match
longjmp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104419 91177308-0d34-0410-b5e6-96231b3b80d8
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so that it will continue to test what it was meant to test when I commit a
separate change for better support of BUILD_VECTOR and VECTOR_SHUFFLE for Neon.
Fix a DAG combiner crash exposed by this test change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104380 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104306 91177308-0d34-0410-b5e6-96231b3b80d8
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what for latency in hybrid mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104293 91177308-0d34-0410-b5e6-96231b3b80d8
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pipeline stall. It's useful for targets like ARM cortex-a8. NEON has a lot
of long latency instructions so a strict register pressure reduction
scheduler does not work well.
Early experiments show this speeds up some NEON loops by over 30%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104216 91177308-0d34-0410-b5e6-96231b3b80d8
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test/Codegen/ARM/reg_sequence.ll but it doesn't affect the generated code
because the coalescer cleans it up. Radar 7998853.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104185 91177308-0d34-0410-b5e6-96231b3b80d8
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