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2011-02-04Introducing a new method of tracking register pressure. We can'tAndrew Trick
precisely track pressure on a selection DAG, but we can at least keep it balanced. This design accounts for various interesting aspects of selection DAGS: register and subregister copies, glued nodes, dead nodes, unused registers, etc. Added SUnit::NumRegDefsLeft and ScheduleDAGSDNodes::RegDefIter. Note: I disabled PrescheduleNodesWithMultipleUses when register pressure is enabled, based on no evidence other than I don't think it makes sense to have both enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124853 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-03whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124827 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-02Given a pair of floating point load and store, if there are no other uses ofEvan Cheng
the load, then it may be legal to transform the load and store to integer load and store of the same width. This is done if the target specified the transformation as profitable. e.g. On arm, this can transform: vldr.32 s0, [] vstr.32 s0, [] to ldr r12, [] str r12, [] rdar://8944252 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124708 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-01Take Bill Wendling's suggestion for structuring a couple of asserts.Matt Beaumont-Gay
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124688 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-31Keep track of incoming argument's location while emitting LiveIns.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124611 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-31Fix bug where ReduceLoadWidth was creating illegal ZEXTLOAD instructions.Richard Osborne
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124587 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-30Teach DAGCombine to fold fold (sra (trunc (sr x, c1)), c2) -> (trunc (sra x, ↵Benjamin Kramer
c1+c2) when c1 equals the amount of bits that are truncated off. This happens all the time when a smul is promoted to a larger type. On x86-64 we now compile "int test(int x) { return x/10; }" into movslq %edi, %rax imulq $1717986919, %rax, %rax movq %rax, %rcx shrq $63, %rcx sarq $34, %rax <- used to be "shrq $32, %rax; sarl $2, %eax" addl %ecx, %eax This fires 96 times in gcc.c on x86-64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124559 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-29Add the missing sub identity "A-(A-B) -> B" to DAGCombine.Benjamin Kramer
This happens e.g. for code like "X - X%10" where we lower the modulo operation to a series of multiplies and shifts that are then subtracted from X, leading to this missed optimization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124532 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-28Fix build with stdcxx by using llvm::next. Patch by Joerg Sonnenberger!Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124472 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-27Remove a temporary workaround for a lencod miscompile. Depends on the fix in ↵Andrew Trick
r124442. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124443 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-27Speculatively revert r124380.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124397 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-27While legalizing SDValues do not drop SDDbgValues, trasfer them to new legal ↵Devang Patel
nodes. Take 2. This includes fix for dragonegg crash. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124380 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-27Try harder to not have unused variables.Matt Beaumont-Gay
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124350 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-27Opt-mode -Wunused-variable cleanupMatt Beaumont-Gay
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124346 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-27Reapply 124301Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124339 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26Initialize variable to get rid of clang warning.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124331 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26Revert 124301.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124327 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26Revert r124302Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124320 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26[AVX] Add INSERT_SUBVECTOR and support it on x86. This provides aDavid Greene
default implementation for x86, going through the stack in a similr fashion to how the codegen implements BUILD_VECTOR. Eventually this will get matched to VINSERTF128 if AVX is available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124307 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26While legalizing SDValues do not drop SDDbgValues, trasfer them to new legal ↵Devang Patel
nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124302 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26Process valid SDDbgValues even if the node does not have any order assigned.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124301 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26Refactor.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124300 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26[AVX] Support EXTRACT_SUBVECTOR on x86. This provides a defaultDavid Greene
implementation of EXTRACT_SUBVECTOR for x86, going through the stack in a similr fashion to how the codegen implements BUILD_VECTOR. Eventually this will get matched to VEXTRACTF128 if AVX is available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124292 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-25Provide an interface to transfer SDDbgValue from one SDNode to another.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124245 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-25Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value ↵Devang Patel
intrinisic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124203 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-25This assertion is too restrictive, it does not apply for dangling dbg value ↵Devang Patel
nodes (nodes where dbg.value intrinsic preceds use of the value). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124202 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-24Speculatively revert r124138.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124142 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-24Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value ↵Devang Patel
intrinisic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124138 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-24Temporarily workaround JM/lencod miscompile (SIGSEGV).Andrew Trick
rdar://problem/8893967 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124137 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23Null initialize a few variables flagged byTed Kremenek
clang's -Wuninitialized-experimental warning. While these don't look like real bugs, clang's -Wuninitialized-experimental analysis is stricter than GCC's, and these fixes have the benefit of being general nice cleanups. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124073 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21Enable support for precise scheduling of the instruction selectionAndrew Trick
DAG. Disable using "-disable-sched-cycles". For ARM, this enables a framework for modeling the cpu pipeline and counting stalls. It also activates several heuristics to drive scheduling based on the model. Scheduling is inherently imprecise at this stage, and until spilling is improved it may defeat attempts to schedule. However, this framework provides greater control over tuning codegen. Although the flag is not target-specific, it should have very little affect on the default scheduler used by x86. The only two changes that affect x86 are: - scheduling a high-latency operation bumps the current cycle so independent operations can have their latency covered. i.e. two independent 4 cycle operations can produce results in 4 cycles, not 8 cycles. - Two operations with equal register pressure impact and no latency-based stalls on their uses will be prioritized by depth before height (height is irrelevant if no stalls occur in the schedule below this point). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123971 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21Convert -enable-sched-cycles and -enable-sched-hazard to -disableAndrew Trick
flags. They are still not enable in this revision. Added TargetInstrInfo::isZeroCost() to fix a fundamental problem with the scheduler's model of operand latency in the selection DAG. Generalized unit tests to work with sched-cycles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123969 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20My editor's indent went crazy. Fix.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123909 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Expand invalid return values for umulo and smulo. Handle these similarlyEric Christopher
to add/sub by doing the normal operation and then checking for overflow afterwards. This generally relies on the DAG handling the later invalid operations as well. Fixes the 64-bit part of rdar://8622122 and rdar://8774702. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123908 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Selection DAG scheduler register pressure heuristic fixes.Andrew Trick
Added a check for already live regs before claiming HighRegPressure. Fixed a few cases of checking the wrong number of successors. Added some tracing until these heuristics are better understood. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123892 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Use only one API at a time.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123866 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20If we can, lower the multiply part of a umulo/smulo call to a libcallEric Christopher
with an invalid type then split the result and perform the overflow check normally. Fixes the 32-bit parts of rdar://8622122 and rdar://8774702. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123864 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18Remove unused variables found by gcc-4.6's -Wunused-but-set-variable.Jeffrey Yasskin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123707 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18Remove checking that prevented overlapping CALLSEQ_START/CALLSEQ_ENDStuart Hastings
ranges, add legalizer support for nested calls. Necessary for ARM byval support. Radar 7662569. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123704 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17Fix an off-by-one error in ctpop combining.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123664 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17Add a DAGCombine to turn (ctpop x) u< 2 into (x & x-1) == 0.Benjamin Kramer
This shaves off 4 popcounts from the hacked 186.crafty source. This is enabled even when a native popcount instruction is available. The combined code is one operation longer but it should be faster nevertheless. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123621 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16reapply my fix for PR8961 with a tweak to properly handleChris Lattner
multi-instruction sequences like calls. Many thanks to Jakob for finding a testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123559 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-15Add an assert so we don't silently miscompile ctpop for bit widths > 128.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123549 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-15Reimplement CTPOP legalization with the "best" algorithm fromBenjamin Kramer
http://graphics.stanford.edu/~seander/bithacks.html#CountBitsSetParallel In a silly microbenchmark on a 65 nm core2 this is 1.5x faster than the old code in 32 bit mode and about 2x faster in 64 bit mode. It's also a lot shorter, especially when counting 64 bit population on a 32 bit target. I hope this is fast enough to replace Kernighan-style counting loops even when the input is rather sparse. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123547 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14Delete an assignment to ThisBB which isn't needed, and tidy up someDan Gohman
comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123479 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14Support for precise scheduling of the instruction selection DAG,Andrew Trick
disabled in this checkin. Sorry for the large diffs due to refactoring. New functionality is all guarded by EnableSchedCycles. Scheduling the isel DAG is inherently imprecise, but we give it a best effort: - Added MayReduceRegPressure to allow stalled nodes in the queue only if there is a regpressure need. - Added BUHasStall to allow checking for either dependence stalls due to latency or resource stalls due to pipeline hazards. - Added BUCompareLatency to encapsulate and standardize the heuristics for minimizing stall cycles (vs. reducing register pressure). - Modified the bottom-up heuristic (now in BUCompareLatency) to prioritize nodes by their depth rather than height. As long as it doesn't stall, height is irrelevant. Depth represents the critical path to the DAG root. - Added hybrid_ls_rr_sort::isReady to filter stalled nodes before adding them to the available queue. Related Cleanup: most of the register reduction routines do not need to be templates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123468 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14Set the insertion point correctly for instructions generated by load folding:Chris Lattner
they should go *before* the new instruction not after it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123420 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13Fix r123346 to handle scalar types too.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123352 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12Apply the patch from PR8958, which allows llc to get slightlyDan Gohman
further on the associated testcase before aborting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123346 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11Move ExpandAtomic into the integer expansion routines - it's only used there.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123202 91177308-0d34-0410-b5e6-96231b3b80d8
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