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path: root/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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2006-03-01Add interfaces for targets to provide target-specific dag combiner ↵Chris Lattner
optimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26442 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27Implement bit propagation through sub nodes, this (re)implementsChris Lattner
PowerPC/div-2.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26392 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27Check RHS simplification before LHS simplification to avoid infinitely loopingChris Lattner
on PowerPC/small-arguments.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26389 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27Just like we use the RHS of an AND to simplify the LHS, use the LHS toChris Lattner
simplify the RHS. This allows for the elimination of many thousands of ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2 into this: _test2: srwi r2, r3, 1 xori r3, r2, 40961 blr instead of this: _test2: rlwinm r2, r3, 31, 17, 31 xori r2, r2, 40961 rlwinm r3, r2, 0, 16, 31 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26388 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-26Add a bunch of missed cases. Perhaps the most significant of which is thatChris Lattner
assertzext produces zero bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26386 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24Recognize memory operand codesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26345 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22Don't return registers from register classes that aren't legal.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26317 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22split register class handling from explicit physreg handling.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26308 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-21Updates to match change of getRegForInlineAsmConstraint prototypeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26305 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-18Add a fold for add that exchanges it with a constant shift if possible, soNate Begeman
that the shift may be more easily folded into other operations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26286 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17Fix bug noticed by VC++.Jeff Cohen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26252 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16Rework the SelectionDAG-based implementations of SimplifyDemandedBitsNate Begeman
and ComputeMaskedBits to match the new improved versions in instcombine. Tested against all of multisource/benchmarks on ppc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26238 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14Rename maxStoresPerMemSet to maxStoresPerMemset, etc.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26174 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04implementation of some methods for inlineasmChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25951 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Implement some feedback from sabreNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25946 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Add a framework for eliminating instructions that produces undemanded bits.Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02Implement MaskedValueIsZero for ANY_EXTEND nodesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25900 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01Beef up the interface to inline asm constraint parsing, making it more ↵Chris Lattner
general, useful, and easier to use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25866 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30Move MaskedValueIsZero from the DAGCombiner to the TargetLowering ↵Chris Lattner
interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25803 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30adjust prototypeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25798 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29clean up interface to ValueTypeActionsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25783 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26Implement a method for inline asm supportChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25660 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25initialize an instance var, apparently I forgot to commit this long agoChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25609 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25Set SchedulingForLatency to be the default scheduling preference for all.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25607 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21Lefted out TargetLowering::Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24922 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21* Fix a GlobalAddress lowering bug.Evan Cheng
* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24921 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-20Added a hook to print out names of target specific DAG nodes.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24877 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29Add the majority of the vector machien value types we expect to support,Nate Begeman
and make a few changes to the legalization machinery to support more than 16 types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24511 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-22Rather than attempting to legalize 1 x float, make sure the SD ISel neverNate Begeman
generates it. Make MVT::Vector expand-only, and remove the code in Legalize that attempts to legalize it. The plan for supporting N x Type is to continually epxand it in ExpandOp until it gets down to 2 x Type, where it will be scalarized into a pair of scalars. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24482 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21Invert the TargetLowering flag that controls divide by consant expansion.Nate Begeman
Add a new flag to TargetLowering indicating if the target has really cheap signed division by powers of two, make ppc use it. This will probably go away in the future. Implement some more ISD::SDIV folds in the dag combiner Remove now dead code in the x86 backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23853 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-27initialize new flagChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23480 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-27Change the names of member variables per Chris' instructions, and documentReid Spencer
them more clearly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23118 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-24Adjust to new interfaceChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23010 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-19For: memory operations -> storesReid Spencer
This is the first incremental patch to implement this feature. It adds no functionality to LLVM but setup up the information needed from targets in order to implement the optimization correctly. Each target needs to specify the maximum number of store operations for conversion of the llvm.memset, llvm.memcpy, and llvm.memmove intrinsics into a sequence of store operations. The limit needs to be chosen at the threshold of performance for such an optimization (generally smallish). The target also needs to specify whether the target can support unaligned stores for multi-byte store operations. This helps ensure the optimization doesn't generate code that will trap on an alignment errors. More patches to follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22468 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-21Remove trailing whitespaceMisha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21422 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19Add a hook to find out how the target handles shift amounts that are out ofChris Lattner
range. Either they are undefined (the default), they mask the shift amount to the size of the register (X86, Alpha, etc), or they extend the shift (PPC). This defaults to undefined, which is conservatively correct. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19677 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-16Shift and setcc types default to the pointer type.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19619 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-16Use enums, move virtual dtor out of line.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19610 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-16Set up identity transforms.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19584 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-16Move some information out of LegalizeDAG into the generic Target interface.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19581 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11Clear the whole array, always.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19482 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-07First draft of new Target interfaceChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19324 91177308-0d34-0410-b5e6-96231b3b80d8
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