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path: root/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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2007-12-22Add a new FGETSIGN operation, which defaults to expand on allChris Lattner
targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45320 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-27Support returning non-power-of-2 vectors to unblock some workNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44371 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09Much improved pic jumptable codegen:Evan Cheng
Then: call "L1$pb" "L1$pb": popl %eax ... LBB1_1: # entry imull $4, %ecx, %ecx leal LJTI1_0-"L1$pb"(%eax), %edx addl LJTI1_0-"L1$pb"(%ecx,%eax), %edx jmpl *%edx .align 2 .set L1_0_set_3,LBB1_3-LJTI1_0 .set L1_0_set_2,LBB1_2-LJTI1_0 .set L1_0_set_5,LBB1_5-LJTI1_0 .set L1_0_set_4,LBB1_4-LJTI1_0 LJTI1_0: .long L1_0_set_3 .long L1_0_set_2 Now: call "L1$pb" "L1$pb": popl %eax ... LBB1_1: # entry addl LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax jmpl *%eax .align 2 .set L1_0_set_3,LBB1_3-"L1$pb" .set L1_0_set_2,LBB1_2-"L1$pb" .set L1_0_set_5,LBB1_5-"L1$pb" .set L1_0_set_4,LBB1_4-"L1$pb" LJTI1_0: .long L1_0_set_3 .long L1_0_set_2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43924 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09Didn't mean to check these in.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43923 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09Bug fix. Passive nodes are not in SUnitMap.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43922 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05Move the LowerMEMCPY and LowerMEMCPYCall to a common place.Rafael Espindola
Thanks for the suggestions Bill :-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43742 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05Make labels work in asm blocks; allow labels asDale Johannesen
parameters. Rename ValueRefList to ParamList in AsmParser, since its only use is for parameters. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43734 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11Add runtime library names for pow.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42880 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} toDan Gohman
use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code associated with these operators into target-independent in LegalizeDAG.cpp and TargetLowering.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42762 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05First round of ppc long double. call/return andDale Johannesen
basic arithmetic works. Rename RTLIB long double functions to distinguish different flavors of long double; the lib functions have different names, alas. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42644 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-28Add sqrt and powi intrinsics for long double.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42423 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25Move the setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand) andDan Gohman
the check to see if the assembler supports .loc from X86TargetLowering into the superclass TargetLowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42297 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-21initialize SetCCResultContents, fixing PR1693Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42193 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-19More long double fixes. x86_64 should build now.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42155 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-07Add lengthof and endof templates that hide a lot of sizeof computations.Owen Anderson
Patch by Sterling Stein! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41758 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-25rename isOperandValidForConstraint to LowerAsmOperandForConstraint, Chris Lattner
changing the interface to allow for future changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41384 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-09long double 9 of N. This finishes up the X86-32 bitsDale Johannesen
(constants are still not handled). Adds ConvertActions to control fp-to-fp conversions (these are currently defaulted for all other targets, so no changes there). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40958 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-09Initialize the IndexedModeActions array with memset beforeDan Gohman
updating it with calls to setIndexedLoadAction/setIndexedStoreAction, which only update a few bits at a time. This avoids ostensible undefined behavior of operationg on values which may be trap-representations, and as a practical matter fixes errors from valgrind, which doesn't track uninitialized memory with bit granularity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38468 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-28Add new TargetLowering code to provide the final register type that anDan Gohman
illegal value type will be transformed to, for code that needs the register type after all transformations instead of just after the first transformation. Factor out the code that uses this information to do copy-from-regs and copy-to-regs for various purposes into separate functions so that they are done consistently. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37781 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-25Generalize MVT::ValueType and associated functions to be able to representDan Gohman
extended vector types. Remove the special SDNode opcodes used for pre-legalize vector operations, and the special MVT::Vector type used with them. Adjust lowering and legalize to work with the normal SDNode kinds instead, and to use the normal MVT functions to work with vector types instead of using the two special operands that the pre-legalize nodes held. This allows pre-legalize and post-legalize DAGs, and the code that operates on them, to be more consistent. Pre-legalize vector operators can be handled more consistently with scalar operators. And, -view-dag-combine1-dags and -view-legalize-dags now look prettier for vector code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37719 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-22Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits fromDan Gohman
TargetLowering to SelectionDAG so that they have more convenient access to the current DAG, in preparation for the ValueType routines being changed from standalone functions to members of SelectionDAG for the pre-legalize vector type changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37704 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-21Tidy up ValueType names in comments.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37688 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-21Rename TargetLowering::getNumElements and friends toDan Gohman
TargetLowering::getNumRegisters and similar, to avoid confusion with the actual number of elements for vector types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37687 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-30Fix CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll, and PR1473.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37362 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-19same patch as the previous one, but the symmetric caseChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37249 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-19Disable the (A == (B-A)) -> 2*A == B xform when the sub has multiple uses (inChris Lattner
this case, the xform introduces an extra operation). This compiles PowerPC/compare-duplicate.ll into: _test: subf r2, r3, r4 cmplw cr0, r2, r3 bne cr0, LBB1_2 ;F instead of: _test: slwi r2, r3, 1 subf r3, r3, r4 cmplw cr0, r4, r2 bne cr0, LBB1_2 ;F This is target independent of course. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37246 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-18Qualify several calls to functions in the MVT namespace, for consistency.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37230 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-17disable MaskedValueIsZero, ComputeMaskedBits, and SimplifyDemandedBits forChris Lattner
i128 integers. The 64-bit masks are not wide enough to represent the results. These should be converted to APInt someday. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37169 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16Add target hook to specify block size limit for if-conversion.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37134 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03Allow i/s to match (gv+c). This fixes ↵Chris Lattner
CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll and PR1382 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36672 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-18fix a pastoChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36242 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17Fix a bug in my previous patch, grabbing the shift amount width from theChris Lattner
wrong operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36223 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17Fold (x << c1)>> c2 into a single shift if the bits shifted out aren't used.Chris Lattner
This compiles: int baz(long long a) { return (short)(((int)(a >>24)) >> 9); } into: _baz: srwi r2, r3, 1 extsh r3, r2 blr on PPC, instead of: _baz: slwi r2, r3, 8 srwi r2, r2, 9 extsh r3, r2 blr GCC produces: _baz: srwi r10,r4,24 insrwi r10,r3,24,0 srawi r9,r3,24 srawi r3,r10,9 extsh r3,r3 blr This implements CodeGen/PowerPC/shl_elim.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36221 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-16Removed tabs everywhere except autogenerated & external files. Add makeAnton Korobeynikov
target for tabs checking. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36146 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12Fix weirdness handling single element vectors.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35941 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09remove dead target hooks.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35847 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09remove some dead target hooks, subsumed by isLegalAddressingModeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35840 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-31switch TL::getValueType to use MVT::getValueType.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35527 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-30add one addressing mode description hook to rule them all.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35520 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28Remove isLegalAddressImmediate.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35406 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25implement initial support for the silly X constraint. Testcase here: ↵Chris Lattner
CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35327 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.llChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35324 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25switch TargetLowering::getConstraintType to take the entire constraint,Chris Lattner
not just the first letter. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35322 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21repair x86 performance, dejagnu problems from previous changeDale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35245 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20do not share old induction variables when this would result in invalidDale Johannesen
instructions (that would have to be split later) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35227 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16Added isLegalAddressExpression hook to test if the given expression can beEvan Cheng
folded into target addressing mode for the given type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35121 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12More flexible TargetLowering LSR hooks for testing whether an immediate is a ↵Evan Cheng
legal target address immediate or scale. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35076 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25initialize a instance variableChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34567 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-24Fix CodeGen/Generic/2007-02-23-DAGCombine-Miscompile.ll and PR1219Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34551 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-22Need to init.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34499 91177308-0d34-0410-b5e6-96231b3b80d8
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