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path: root/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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2008-07-11It is pointless to turn a UINT_TO_FP into anDuncan Sands
SINT_TO_FP libcall plus additional operations: it might as well be a direct UINT_TO_FP libcall. So only turn it into an SINT_TO_FP if the target has special handling for SINT_TO_FP. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53461 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11Add two missing SINT_TO_FP libcalls.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53460 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11Add support for 128 bit shifts and 32 bit shiftsDuncan Sands
on 16 bit machines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53458 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-10Add support for 128 bit multiplicative operations.Duncan Sands
Lack of these caused a bootstrap failure with Fortran on x86-64 with LegalizeTypes turned on. While there, be nice to 16 bit machines and support expansion of i32 too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53408 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-10Add a mysteriously missing libcall, FPTOSINT_F80_I32.Duncan Sands
Be nice to 16 bit machines by supporting FP_TO_XINT expansion for these. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53407 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-25Add support for expanding PPC 128 bit floats.Duncan Sands
For this it is convenient to permit floats to be used with EXTRACT_ELEMENT, so I tweaked things to allow that. I also added libcalls for ppcf128 to i32 forms of FP_TO_XINT, since they exist in libgcc and this case can certainly occur (and does occur in the testsuite) - before the i64 libcall was being used. Also, the XINT_TO_FP result seemed to be wrong when the argument is an i128: the wrong fudge factor was added (the i32 and i64 cases were handled directly, but the i128 code fell through to some generic softening code which seemed to think it was i64 to f32!). So I fixed it by adding a fudge factor that I found in my breakfast cereal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52739 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-09Teach isGAPlusOffset to respect a GlobalAddressSDNode's offsetDan Gohman
value, which is something that apparently isn't used much. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52158 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-09Various tweaks related to apint codegen. No functionalityDuncan Sands
change for non-funky-sized integers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52151 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-08Remove comparison methods for MVT. The main causeDuncan Sands
of apint codegen failure is the DAG combiner doing the wrong thing because it was comparing MVT's using < rather than comparing the number of bits. Removing the < method makes this mistake impossible to commit. Instead, add helper methods for comparing bits and use them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52098 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06Wrap MVT::ValueType in a struct to get type safetyDuncan Sands
and better control the abstraction. Rename the type to MVT. To update out-of-tree patches, the main thing to do is to rename MVT::ValueType to MVT, and rewrite expressions like MVT::getSizeInBits(VT) in the form VT.getSizeInBits(). Use VT.getSimpleVT() to extract a MVT::SimpleValueType for use in switch statements (you will get an assert failure if VT is an extended value type - these shouldn't exist after type legalization). This results in a small speedup of codegen and no new testsuite failures (x86-64 linux). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12Xform bitconvert(build_pair(load a, load b)) to a single load if the load ↵Evan Cheng
locations are at the right offset from each other. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51008 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12Refactor isConsecutiveLoad from X86 to TargetLowering so DAG combiner can ↵Evan Cheng
make use of it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50991 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-06Instead of enumerating each opcode that isn't handled thatDan Gohman
ComputeMaskedBits handles, just use a 'default:'. This avoids TargetLowering's list getting out of date with SelectionDAG's. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50693 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-05Added addition atomic instrinsics and, or, xor, min, and max.Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50663 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-27typoChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50316 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-27Implement a signficant optimization for inline asm:Chris Lattner
When choosing between constraints with multiple options, like "ir", test to see if we can use the 'i' constraint and go with that if possible. This produces more optimal ASM in all cases (sparing a register and an instruction to load it), and fixes inline asm like this: void test () { asm volatile (" %c0 %1 " : : "imr" (42), "imr"(14)); } Previously we would dump "42" into a memory location (which is ok for the 'm' constraint) which would cause a problem because the 'c' modifier is not valid on memory operands. Isn't it great how inline asm turns 'missed optimization' into 'compile failed'?? Incidentally, this was the todo in PowerPC/2007-04-24-InlineAsm-I-Modifier.ll Please do NOT pull this into Tak. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50315 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-27Move a bunch of inline asm code out of line.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50313 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-26A few inline asm cleanups:Chris Lattner
- Make targetlowering.h fit in 80 cols. - Make LowerAsmOperandForConstraint const. - Make lowerXConstraint -> LowerXConstraint - Make LowerXConstraint return a const char* instead of taking a string byref. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50312 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-12Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not LegalDan Gohman
on any current target and aren't optimized in DAGCombiner. Instead of using intermediate nodes, expand the operations, choosing between simple loads/stores, target-specific code, and library calls, immediately. Previously, the code to emit optimized code for these operations was only used at initial SelectionDAG construction time; now it is used at all times. This fixes some cases where rep;movs was being used for small copies where simple loads/stores would be better. This also cleans up code that checks for alignments less than 4; let the targets make that decision instead of doing it in target-independent code. This allows x86 to use rep;movs in low-alignment cases. Also, this fixes a bug that resulted in the use of rep;stos for memsets of 0 with non-constant memory size when the alignment was at least 4. It's better to use the library in this case, which can be significantly faster when the size is large. This also preserves more SourceValue information when memory intrinsics are lowered into simple loads/stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49572 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-06Prefer to expand mask for xor to -1, so we have a chance to turn it into a not.Torok Edwin
If it cannot be expanded, it will keep the old behaviour and try to shrink the constant. Part of enhancement for PR2191. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49280 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13More APInt-ification.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48344 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11Use the correct value for InSignBit.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48245 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Implement more support for fp-to-i128 and i128-to-fp conversions. Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48189 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Default ISD::PREFETCH to expand.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48169 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC'sScott Michel
return ValueType can depend its operands' ValueType. This is a cosmetic change, no functionality impacted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48145 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05Codegen support for i128 SINT_TO_FP.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47928 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-03Yet more APInt-ification.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47867 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-03More APInt-ification.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47866 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-28Interface of getByValTypeAlignment differed betweenDale Johannesen
generic & x86 versions; change generic to follow x86 and improve comments. Add PPC version (not right for non-Darwin.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47734 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-28Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to ↵Evan Cheng
16-byte boundaries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47703 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27Convert SimplifyDemandedMask and ShrinkDemandedConstant to use APInt.Dan Gohman
Change several cases in SimplifyDemandedMask that don't ever do any simplifying to reuse the logic in ComputeMaskedBits instead of duplicating it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47648 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26Change "Name" to "AsmName" in the target register info. Gee, a refactoring toolBill Wendling
would have been a Godsend here! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47625 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26Refactor inline asm constraint matching code out of SDIsel into TargetLowering.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47587 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-25Convert MaskedValueIsZero and all its users to use APInt. Also addDan Gohman
a SignBitIsZero function to simplify a common use case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47561 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-14In TargetLowering::LowerCallTo, don't assert thatDuncan Sands
the return value is zero-extended if it isn't sign-extended. It may also be any-extended. Also, if a floating point value was returned in a larger floating point type, pass 1 as the second operand to FP_ROUND, which tells it that all the precision is in the original type. I think this is right but I could be wrong. Finally, when doing libcalls, set isZExt on a parameter if it is "unsigned". Currently isSExt is set when signed, and nothing is set otherwise. This should be right for all calls to standard library routines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47122 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-14Change how FP immediates are handled. Nate Begeman
1) ConstantFP is now expand by default 2) ConstantFP is not turned into TargetConstantFP during Legalize if it is legal. This allows ConstantFP to be handled like Constant, allowing for targets that can encode FP immediates as MachineOperands. As a bonus, fix up Itanium FP constants, which now correctly match, and match more constants! Hooray. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47121 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-13Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBitsDan Gohman
to pass the mask APInt by value, not by reference. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47096 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-13Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.Dan Gohman
Add an overload that supports the uint64_t interface for use by clients that haven't been updated yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47039 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-10Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-30Factor the addressing mode and the load/store VT out of LoadSDNodeDan Gohman
and StoreSDNode into their common base class LSBaseSDNode. Member functions getLoadedVT and getStoredVT are replaced with the common getMemoryVT to simplify code that will handle both loads and stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46538 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-29Handle 'X' constraint in asm's better.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46485 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-24Forgot these.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46292 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-18remove extraneous &'s.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46171 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-17This commit changes:Chris Lattner
1. Legalize now always promotes truncstore of i1 to i8. 2. Remove patterns and gunk related to truncstore i1 from targets. 3. Rename the StoreXAction stuff to TruncStoreAction in TLI. 4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions. 5. Mark a wide variety of invalid truncstores as such in various targets, e.g. X86 currently doesn't support truncstore of any of its integer types. 6. Add legalize support for truncstores with invalid value input types. 7. Add a dag combine transform to turn store(truncate) into truncstore when safe. The later allows us to compile CodeGen/X86/storetrunc-fp.ll to: _foo: fldt 20(%esp) fldt 4(%esp) faddp %st(1) movl 36(%esp), %eax fstps (%eax) ret instead of: _foo: subl $4, %esp fldt 24(%esp) fldt 8(%esp) faddp %st(1) fstps (%esp) movl 40(%esp), %eax movss (%esp), %xmm0 movss %xmm0, (%eax) addl $4, %esp ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46140 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-15Add support for targets that have a legal ISD::TRAP.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46014 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-10Output sinl for a long double FSIN node, not sin.Duncan Sands
Likewise fix up a bunch of other libcalls. While there I remove NEG_F32 and NEG_F64 since they are not used anywhere. This fixes 9 Ada ACATS failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45833 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-30fix typo duncan noticed!Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45459 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29Remove attribution from file headers, per discussion on llvmdev.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29Fold comparisons against a constant nan, and optimize ORD/UNORD Chris Lattner
comparisons with a constant. This allows us to compile isnan to: _foo: fcmpu cr7, f1, f1 mfcr r2 rlwinm r3, r2, 0, 31, 31 blr instead of: LCPI1_0: ; float .space 4 _foo: lis r2, ha16(LCPI1_0) lfs f0, lo16(LCPI1_0)(r2) fcmpu cr7, f1, f0 mfcr r2 rlwinm r3, r2, 0, 31, 31 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45405 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-22initial code for forming an FGETSIGN node. This is disabled untilChris Lattner
legalizer support goes in. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45323 91177308-0d34-0410-b5e6-96231b3b80d8
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