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It couldn't be used outside of the file because SDISelAsmOperandInfo
is local to SelectionDAGBuilder.cpp. Making it a static function avoids
a weird linkage dance.
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rather than an int. Thankfully, this only causes LLVM to miss optimizations, not
generate incorrect code.
This just fixes the zext at the return. We still insert an i32 ZextAssert when
reading a function's arguments, but it is followed by a truncate and another i8
ZextAssert so it is not optimized.
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without being touched, so no longer needs to pollute the hidden-help text.
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the type of the LHS.
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and make the actual map private.
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registers
at phis. This enables us to eliminate a lot of pointless zexts during the DAGCombine
phase. This fixes <rdar://problem/8760114>.
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is only used through GEPs.
This time with a fix that avoids using invalidated DenseMap iterator.
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is only used through GEPs.
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builders unhappy.
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idiom. Change various clients to simplify their code.
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generating i8 shift amounts for things like i1024 types. Add
an assert in getNode to prevent this from occuring in the future,
fix the buggy transformation, revert my previous patch, and
document this gotcha in ISDOpcodes.h
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the shift amounts are in a suitably wide type so that
we don't generate out of range constant shift amounts.
This fixes PR9028.
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is narrower than the shift register. Doing an anyext provides undefined bits in
the top part of the register.
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intrinisic.
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intrinisic.
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and fixes here and there.
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These functions not longer assert when passed 0, but simply return false instead.
No functional change intended.
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TargetRegisterInfo::FirstVirtualRegister.
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Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.
This allows memory instructions to be moved around INLINEASM instructions.
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Also fix an off-by-one in SelectionDAGBuilder that was preventing shuffle
vectors from being translated to EXTRACT_SUBVECTOR.
Patch by Tim Northover.
The test changes are needed to keep those spill-q tests from testing aligned
spills and restores. If the only aligned stack objects are spill slots, we
no longer realign the stack frame. Prior to this patch, an EXTRACT_SUBVECTOR
was legalized by loading from the stack, which created an aligned frame index.
Now, however, there is nothing except the spill slot in the stack frame, so
I added an aligned alloca.
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the original type of the switch statement key.
rdar://8781238
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something that just glues two nodes together, even if it is
sometimes used for flags.
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zextOrTrunc(), and APSInt methods extend(), extOrTrunc() and new method
trunc(), to be const and to return a new value instead of modifying the
object in place.
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message instead of creating DBG_VALUE for undefined value in reg0.
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and use this to disable a specific optimization. Patch by Micah Villmow!
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This currently only catches the most basic case, a two-case switch, but can be
extended later.
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but not complicated enough to merit another test.
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catastrophic compilation time in the event of unreasonable LLVM
IR. Code quality is a separate issue--someone upstream needs to do a
better job of reducing to llvm.memcpy. If the situation can be reproduced with
any supported frontend, then it will be a separate bug.
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value type, so there is no point in passing it around using
an EVT. Use the simpler MVT everywhere. Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.
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index before giving up.
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parameter.
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basic logic, added initial platform support.
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memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet). No functional change except
for dump output.
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potentially null "CalledFunction". Thanks Duncan!
This is needed for indirect calls.
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