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instead of scalarizing, and doing an element-by-element truncat.
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BranchProbabilityInfo (expect setEdgeWeight which is not available here).
Branch Weights are kept in MachineBasicBlocks. To turn off this analysis
set -use-mbpi=false.
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This virtual function will replace allocation_order_begin/end as the one
to override when implementing custom allocation orders. It is simpler to
have one function return an ArrayRef than having two virtual functions
computing different ends of the same array.
Use getRawAllocationOrder() in place of allocation_order_begin() where
it makes sense, but leave some clients that look like they really want
the filtered allocation orders from RegisterClassInfo.
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or instruction cache access. Update the targets to match it and also teach
autoupgrade.
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Instead of scalarizing, and doing an element-by-element truncat, use vector
truncate.
Add support for scalarization of vectors: i8 -> <1 x i1> (from Duncan's
testcase).
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No functional change.
Part of PR6965
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(copyFromParts/copyToParts).
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Part of rdar://9119939
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types if the vector type is legal.
Fixes rdar://9306086
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end of function.
Patch by Micah Villmow
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when we're just going to throw the result away. No functionality change.
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Radar 9422775.
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to fix PR9900. I will keep it open until sable is able to comment on it.
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intrinsic call. This prevents it from being reordered so that it appears
*before* the setjmp intrinsic (thus making it completely useless).
<rdar://problem/9409683>
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rdar://problem/9413587 .
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Patch by Evan Cheng.
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this can make MachineCSE more effective in some cases (especially in small functions). PR8361 / part of rdar://problem/8259436 .
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incoming argument. However, It is appropriate to emit DBG_VALUE referring to this incoming argument in entry block in MachineFunction.
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Luis Felipe Strano Moraes!
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code.
Switch lowering probably shouldn't be using FP for this. This resolves PR9581.
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is lowered into a call to the specified trap function at sdisel time.
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It needed to be moved closer to the setjmp statement, because the code directly
after the setjmp needs to know about values that are on the stack. Also, the
'bitcast' of the function context was causing a dead load. This wouldn't be too
horrible, except that at -O0 it wasn't optimized out, and because it wasn't
using the correct base pointer (if there is a VLA), it would try to access a
value from a garbage address.
<rdar://problem/9130540>
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should improve src line debug info when sdisel is used. rdar://9199118
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It couldn't be used outside of the file because SDISelAsmOperandInfo
is local to SelectionDAGBuilder.cpp. Making it a static function avoids
a weird linkage dance.
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rather than an int. Thankfully, this only causes LLVM to miss optimizations, not
generate incorrect code.
This just fixes the zext at the return. We still insert an i32 ZextAssert when
reading a function's arguments, but it is followed by a truncate and another i8
ZextAssert so it is not optimized.
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without being touched, so no longer needs to pollute the hidden-help text.
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the type of the LHS.
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and make the actual map private.
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registers
at phis. This enables us to eliminate a lot of pointless zexts during the DAGCombine
phase. This fixes <rdar://problem/8760114>.
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is only used through GEPs.
This time with a fix that avoids using invalidated DenseMap iterator.
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is only used through GEPs.
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builders unhappy.
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idiom. Change various clients to simplify their code.
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generating i8 shift amounts for things like i1024 types. Add
an assert in getNode to prevent this from occuring in the future,
fix the buggy transformation, revert my previous patch, and
document this gotcha in ISDOpcodes.h
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the shift amounts are in a suitably wide type so that
we don't generate out of range constant shift amounts.
This fixes PR9028.
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is narrower than the shift register. Doing an anyext provides undefined bits in
the top part of the register.
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intrinisic.
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intrinisic.
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