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path: root/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
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2006-10-14Debug tweak.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30959 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-27s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29911 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17switch the SUnit pred/succ sets from being std::sets to being smallvectors.Chris Lattner
This reduces selectiondag time on kc++ from 5.43s to 4.98s (9%). More significantly, this speeds up the default ppc scheduler from ~1571ms to 1063ms, a 33% speedup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29743 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-02Final polish on machine pass registries.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29471 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-011. Change use of "Cache" to "Default".Jim Laskey
2. Added argument to instruction scheduler creators so the creators can do special things. 3. Repaired target hazard code. 4. Misc. More to follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29450 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-01Introducing plugable register allocators and instruction schedulers.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29434 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-21Use an enumeration to eliminate data relocations.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29249 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28Use hidden visibility to make symbols in an anonymous namespace getChris Lattner
dropped. This shrinks libllvmgcc.dylib another 67K git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28975 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28Shave another 27K off libllvmgcc.dylib with visibility hiddenChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28973 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-30Make sure the register pressure reduction schedulers work for non-uniformEvan Cheng
latency targets, e.g. PPC32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28561 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25Turn on -sched-commute-nodes by default.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28465 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-13Fixing 2006-05-01-SchedCausingSpills.ll; some clean upEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28279 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12Refactor a bunch of includes so that TargetMachine.h doesn't have to includeOwen Anderson
TargetData.h. This should make recompiles a bit faster with my current TargetData tinkering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28238 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12Add capability to scheduler to commute nodes for profit.Evan Cheng
If a two-address code whose first operand has uses below, it should be commuted when possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28230 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-11Refactor scheduler code. Move register-reduction list scheduler to aEvan Cheng
separate file. Added an initial implementation of top-down register pressure reduction list scheduler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28226 91177308-0d34-0410-b5e6-96231b3b80d8