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path: root/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
AgeCommit message (Expand)Author
2012-02-24Don't crash when a glue node contains an internal CopyToRegHal Finkel
2012-02-03Handle all live physreg defs in the same place.Jakob Stoklund Olesen
2012-01-20More dead code removal (using -Wunreachable-code)David Blaikie
2012-01-18Add a RegisterMaskSDNode class.Jakob Stoklund Olesen
2012-01-18Fix ISD::REG_SEQUENCE to accept physical registers and change TwoAddressInstr...Pete Cooper
2011-12-07Add bundle aware API for querying instruction properties and switch the codeEvan Cheng
2011-10-05Simplify EXTRACT_SUBREG emission.Jakob Stoklund Olesen
2011-10-05Simplify INSERT_SUBREG emission.Jakob Stoklund Olesen
2011-09-30Move getCommonSubClass() into TRI.Jakob Stoklund Olesen
2011-09-22Constrain register classes instead of emitting copies.Jakob Stoklund Olesen
2011-09-21Lower ARM adds/subs to add/sub after adding optional CPSR operand.Andrew Trick
2011-09-20Restore hasPostISelHook tblgen flag.Andrew Trick
2011-09-20ARM isel bug fix for adds/subs operands.Andrew Trick
2011-09-20whitespaceAndrew Trick
2011-08-30Follow up to r138791.Evan Cheng
2011-07-18land David Blaikie's patch to de-constify Type, with a few tweaks.Chris Lattner
2011-06-28- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng
2011-06-27More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo.Evan Cheng
2011-06-27Distinguish early clobber output operands from clobbered registers.Jakob Stoklund Olesen
2011-06-24Handle debug info for i128 constants.Devang Patel
2011-06-16Don't use register classes larger than TLI->getRegClassFor(VT).Jakob Stoklund Olesen
2011-06-16Change the REG_SEQUENCE SDNode to take an explict register class ID as its fi...Owen Anderson
2011-06-02Use TRI::has{Sub,Super}ClassEq() where possible.Jakob Stoklund Olesen
2011-01-10Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.Jakob Stoklund Olesen
2011-01-07Do not model all INLINEASM instructions as having unmodelled side effects.Evan Cheng
2011-01-05Optimize:Evan Cheng
2010-12-23flags -> glue for selectiondagChris Lattner
2010-12-23Change all self assignments X=X to (void)X, so that we can turn on aJeffrey Yasskin
2010-12-21rename MVT::Flag to MVT::Glue. "Flag" is a terrible name forChris Lattner
2010-12-17Fix crash compiling a QQQQ REG_SEQUENCE for a Neon vld3_lane operation.Bob Wilson
2010-12-08Reword comment slightly.Eric Christopher
2010-11-16Split pseudo-instruction expansion into a separate pass, to make itDan Gohman
2010-08-30Revert r112461. It was failing on PPC...Bill Wendling
2010-08-30When adding a register, we should mark it as "def" if it can optionally defineBill Wendling
2010-07-10Emit COPY instructions instead of using copyRegToReg in InstrEmitter,Jakob Stoklund Olesen
2010-07-10Insert IMPLICIT_DEF instructions at the current insert position, notDan Gohman
2010-07-10Reapply bottom-up fast-isel, with several fixes for x86-32:Dan Gohman
2010-07-09--- Reverse-merging r107947 into '.':Bob Wilson
2010-07-09Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emittingDan Gohman
2010-07-08Convert EXTRACT_SUBREG to COPY when emitting machine instrs.Jakob Stoklund Olesen
2010-07-08Revert 107840 107839 107813 107804 107800 107797 107791.Dan Gohman
2010-07-07Not all custom inserters create new basic blocks. If the inserterDan Gohman
2010-07-07Update comment.Devang Patel
2010-07-06Reapply r107655 with fixes; insert the pseudo instruction intoDan Gohman
2010-07-02Propagate the AlignStack bit in InlineAsm's to the Dale Johannesen
2010-06-29Add a VT argument to getMinimalPhysRegClass and replace the copy related usesRafael Espindola
2010-06-18Teach regular and fast isel to set dead flags on unused implicit defsDan Gohman
2010-06-09Mark physregs defined by inline asm as implicit.Jakob Stoklund Olesen
2010-06-09Add argument name comments.Jakob Stoklund Olesen
2010-05-18Continuously refine the register class of REG_SEQUENCE def with all the sourc...Evan Cheng