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path: root/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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2010-11-03Just return undef for invalid masks or elts, and since we're doing that,Eric Christopher
just do it earlier too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118195 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03If we have an undef mask our Elt will be -1 for our access, handleEric Christopher
this by using an undef as a pointer. Fixes rdar://8625016 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118164 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Fix DAGCombiner to avoid going into an infinite loop when itDan Gohman
encounters (and:i64 (shl:i64 (load:i64), 1), 0xffffffff). This fixes rdar://8606584. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118143 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Remove DAG combiner patch to fold vector splats. Instcombiner does it now.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117720 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28Teach the DAG combiner to fold a splat of a splat. Radar 8597790.Bob Wilson
Also do some minor refactoring to reduce indentation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117558 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20Make CodeGen TBAA-aware.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116890 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-04This DAG combine BRCOND transformation can look pass truncate of the operand:Evan Cheng
// %a = ... // %b = and i32 %a, 2 // %c = srl i32 %b, 1 // brcond i32 %c ... // // into // // %a = ... // %b = and i32 %a, 2 // %c = setcc eq %b, 0 // brcond %c ... Make sure it restores local variable N1, which corresponds to the condition operand if it fails to match. This apparently breaks TCE but since that backend isn't in the tree I don't have a test for it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115571 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01fix rdar://8494845 + PR8244 - a miscompile exposed by my patch in r101350Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115294 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22A select between a constant and zero, when fed by a bit test, can be efficientlyOwen Anderson
lowered using a series of shifts. Fixes <rdar://problem/8285015>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114599 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21Reimplement r114460 in target-independent DAGCombine rather than ↵Owen Anderson
target-dependent, by using the predicate to discover the number of sign bits. Enhance X86's target lowering to provide a useful response to this query. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114473 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21update a bunch of code to use the MachinePointerInfo version of getStore.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114461 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21eliminate an old SelectionDAG::getTruncStore method, propagatingChris Lattner
MachinePointerInfo around more. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114452 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21propagate MachinePointerInfo through various uses of the oldChris Lattner
SelectionDAG::getExtLoad overload, and eliminate it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114446 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21convert dagcombine off the old form of getLoad. This fixes several bugs Chris Lattner
with SVOffset computation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114442 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21simplify DAGCombiner::SimplifySelectOps step #2/2.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114437 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21substantially reduce indentation and simplify DAGCombiner::SimplifySelectOps.Chris Lattner
no functionality change (step #1) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114436 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21a few more trivial updates. This fixes PerformInsertVectorEltInMemory to notChris Lattner
pass a completely incorrect SrcValue, which would result in a miscompile with combiner-aa. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114411 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-20When TCO is turned on, it is possible to end up with aliasing FrameIndex's. ↵Owen Anderson
Therefore, CombinerAA cannot assume that different FrameIndex's never alias, but can instead use MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing. This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll when CombinerAA is enabled, modulo a different register allocation sequence. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114348 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-19Revert r114312 while I sort out some issues.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114313 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-19Tentatively enabled DAGCombiner Alias Analysis by default. As far as I know,Owen Anderson
r114268 fixed the last of the blockers to enabling it. I will be monitoring for failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114312 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02Don't narrow the load and store in a load+twiddle+store sequence unlessDan Gohman
there are clearly no stores between the load and the store. This fixes this miscompile reported as PR7833. This breaks the test/CodeGen/X86/narrow_op-2.ll optimization, which is safe, but awkward to prove safe. Move it to X86's README.txt. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112861 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-27Fix a crash in the dag combiner caused by ↵Nate Begeman
ConstantFoldBIT_CONVERTofBUILD_VECTOR calling itself recursively and returning a SCALAR_TO_VECTOR node, but assuming the input was always a BUILD_VECTOR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109519 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19Remove r108639 now that it is handled by InstCombine instead.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108688 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-18Add a DAGCombine xform to fold away redundant float->double->float ↵Owen Anderson
conversions around sqrt instructions. I am assured by people more knowledgeable than me that there are no rounding issues in eliminating this. This fixed <rdar://problem/8197504>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108639 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-12Convert some tab stops into spaces.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108130 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09Reenable DAG combining for vector shuffles. It looks like it was temporarilyBob Wilson
disabled and then never turned back on again. Adjust some tests, one because this change avoids an unnecessary instruction, and the other to make it continue testing what it was intended to test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107941 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08Merge the duplicated iabs optimization in DAGCombiner and let it detected a ↵Benjamin Kramer
few more idioms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107868 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument ↵Evan Cheng
for consistency sake. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107820 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-06Propagate debug loc.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107710 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-28Unlike other targets, ARM now uses BUILD_VECTORs post-legalization so theyBob Wilson
can't be changed arbitrarily by the DAGCombiner without checking if it is running after legalization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107097 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25Remove variables which are assigned to but for which the valueDuncan Sands
is not used. Spotted by gcc-4.6. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106854 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24Reapply r106634, now that the bug it exposed is fixed.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106746 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23Revert r106263, "Fold the ShrinkDemandedOps pass into the regular ↵Daniel Dunbar
DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23Some targets don't require the fencing MEMBARRIER instructions surroundingJim Grosbach
atomic intrinsics, either because the use locking instructions for the atomics, or because they perform the locking directly. Add support in the DAG combiner to fold away the fences. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106630 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,Dan Gohman
which is faster, simpler, and less surprising. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106263 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25Fix another variant of PR 7191. Also add a testcaseDale Johannesen
Mon Ping provided; unfortunately bugpoint failed to reduce it, but I think it's important to have a test for this in the suite. 8023512. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104624 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25Fix PR 7191. I have been unable to create a .ll file that fails, sorry.Dale Johannesen
(oye, a word which should be better known to people writing tree traversals, means grandchild.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104619 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21Clean up extra whitespace.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104410 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elementsBob Wilson
so that it will continue to test what it was meant to test when I commit a separate change for better support of BUILD_VECTOR and VECTOR_SHUFFLE for Neon. Fix a DAG combiner crash exposed by this test change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104380 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19Optimize away insertelement of an undef value. This shows up inBob Wilson
test/Codegen/ARM/reg_sequence.ll but it doesn't affect the generated code because the coalescer cleans it up. Radar 7998853. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104185 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19Intrinsics which do a vector compare (results are all zero or all ones) are ↵Evan Cheng
modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction. The trouble arises when the result of a vector cmp + sext is then and'ed with all ones. Instcombine will turn it into a vector cmp + zext, dag combiner will miss turning it into a vsetcc and hell breaks loose after that. Teach dag combine to turn a vector cpm + zest into a vsetcc + and 1. This fixes rdar://7923010. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104094 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18Sink dag combine's post index load / store code that swap base ptr and index ↵Evan Cheng
into the target hook. Only the target knows whether the swap is safe. In Thumb2 mode, the offset must be an immediate. rdar://7998649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104060 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op ↵Evan Cheng
(build_vector), (build_vector)). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104004 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-10Be careful with operand promotion. For a binary operation, the source ↵Evan Cheng
operands may be the same. PR7018. rdar://7939869. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103419 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-30Apply a patch from Jan Sjodin to fix a compiler abort on vectorDan Gohman
comparisons sign-extended to a different bitwidth than the comparison operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102721 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28Try operation promotion only if regular dag combine and target-specific ones ↵Evan Cheng
failed to do anything. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102492 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-27- When legal, promote a load to zextload rather than ext load.Evan Cheng
- Catch more further dag combine opportunities as result of operand promotion, e.g. (i32 anyext (i16 trunc (i32 x))) -> (i32 x) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102455 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-24When a load operand is promoted to an extload, replace other uses with uses ↵Evan Cheng
of extload result truncated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102236 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-24Apply a fix for a vector setcc dagcombine from Jan Sjodin. NoDan Gohman
testcase yet, as the testcase now fails downstream. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102228 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-23Code refactoring.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102202 91177308-0d34-0410-b5e6-96231b3b80d8
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