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RegAllocGreedy has been the default for six months now.
Deleting RegAllocLinearScan makes it possible to also delete
VirtRegRewriter and clean up the spiller code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144475 91177308-0d34-0410-b5e6-96231b3b80d8
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A public interface is no longer needed since RegisterCoalescer is not an
analysis any more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137082 91177308-0d34-0410-b5e6-96231b3b80d8
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can split live ranges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133962 91177308-0d34-0410-b5e6-96231b3b80d8
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remove the analysis group.
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Also switch the return type to ArrayRef<unsigned> which works out nicely
for ARM's implementation of this function because of the clever ArrayRef
constructors.
The name change indicates that the returned allocation order may contain
reserved registers as has been the case for a while.
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This avoids the manual filtering of reserved registers and removes the
dependency on allocation_order_begin().
Palliative care...
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Add a avoidWriteAfterWrite() target hook to identify register classes that
suffer from write-after-write hazards. For those register classes, try to avoid
writing the same register in two consecutive instructions.
This is currently disabled by default. We should not spill to avoid hazards!
The command line flag -avoid-waw-hazard can be used to enable waw avoidance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129772 91177308-0d34-0410-b5e6-96231b3b80d8
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Luis Felipe Strano Moraes!
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When a virtual register has a single value that is defined as a copy of a
reserved register, permit that copy to be joined. These virtual register are
usually copies of the stack pointer:
%vreg75<def> = COPY %ESP; GR32:%vreg75
MOV32mr %vreg75, 1, %noreg, 0, %noreg, %vreg74<kill>
MOV32mi %vreg75, 1, %noreg, 8, %noreg, 0
MOV32mi %vreg75<kill>, 1, %noreg, 4, %noreg, 0
CALLpcrel32 ...
Coalescing these virtual registers early decreases register pressure.
Previously, they were coalesced by RALinScan::attemptTrivialCoalescing after
register allocation was completed.
The lower register pressure causes the mcinst-lowering-cmp0.ll test case to fail
because it depends on linear scan spilling a particular register.
I am deleting 2008-08-05-SpillerBug.ll because it is counting the number of
instructions emitted, and its revision history shows the 'correct' count being
edited many times.
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printing a single character.
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Add an assertion to linear scan to prevent it from allocating registers outside
the register class.
<rdar://problem/9183021>
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This makes it possible to register delegates and get callbacks when the spiller
edits live ranges.
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SmallVectors.
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The SlotIndex created by the default construction does not represent a position
in the function, and it doesn't make sense to compare it to other indexes.
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Linear scan regalloc is currently assuming that any register aliased with
a member of a regclass must also be in at least one regclass. That is not
always true. For example, for X86, RIP is in a regclass but IP is not.
If you're unlucky, this can cause a crash by invalidating the iterator.
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These functions not longer assert when passed 0, but simply return false instead.
No functional change intended.
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Simplify RALinScan::DowngradeRegister with TRI::getOverlaps while we are there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122940 91177308-0d34-0410-b5e6-96231b3b80d8
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new gcc warning that complains on self-assignments and
self-initializations.
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Patch by Krister Wombell!
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constant loads.
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proper SSA updating.
This doesn't cause MachineDominators to be recomputed since we are already
requiring MachineLoopInfo which uses dominators as well.
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exposes an initializeMyPassFunction(), which
must be called in the pass's constructor. This function uses static dependency declarations to recursively initialize
the pass's dependencies.
Clients that only create passes through the createFooPass() APIs will require no changes. Clients that want to use the
CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h
before parsing commandline arguments.
I have tested this with all standard configurations of clang and llvm-gcc on Darwin. It is possible that there are problems
with the static dependencies that will only be visible with non-standard options. If you encounter any crash in pass
registration/creation, please send the testcase to me directly.
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perform initialization without static constructors AND without explicit initialization
by the client. For the moment, passes are required to initialize both their
(potential) dependencies and any passes they preserve. I hope to be able to relax
the latter requirement in the future.
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whether LiveIntervals::getInstructionFromIndex(def) returns NULL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114791 91177308-0d34-0410-b5e6-96231b3b80d8
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at them since they'd end up in the register weights list. Tell it to stop
doing that.
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physical register in a register class. Make sure to assert if the register
class is empty.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112743 91177308-0d34-0410-b5e6-96231b3b80d8
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r112728 did this for fast regalloc.
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The earliestStart argument is entirely specific to linear scan allocation, and
can be easily calculated by RegAllocLinearScan.
Replace std::vector with SmallVector.
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address of the static
ID member as the sole unique type identifier. Clean up APIs related to this change.
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The spillers can pluck the analyses they need from the pass reference.
Switch some never-null pointers to references.
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non-const.
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TII::isMoveInstr is going tobe completely removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108507 91177308-0d34-0410-b5e6-96231b3b80d8
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EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead.
Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg().
The isMoveInstr hook will be removed later.
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vector instead. This avoids needless copying and allocation.
Add documentation.
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patch by Evzen Muller!
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