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No (intended) functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66720 91177308-0d34-0410-b5e6-96231b3b80d8
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sub-register indices as well.
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point bug.
- If a def is spilt, remember its spill index to allow its reuse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58375 91177308-0d34-0410-b5e6-96231b3b80d8
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- Create and update spill slot live intervals.
- Lots of bug fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58367 91177308-0d34-0410-b5e6-96231b3b80d8
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splitting pass. It's handling simple cases and appear to do good things. Next: avoid splitting an interval multiple times; renumber registers when possible; record stack slot live intervals for coloring; rematerialize defs when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58044 91177308-0d34-0410-b5e6-96231b3b80d8
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instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57521 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56848 91177308-0d34-0410-b5e6-96231b3b80d8
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"If a re-materializable instruction has a register
operand, the spiller will change the register operand's
spill weight to HUGE_VAL to avoid it being spilled.
However, if the operand is already in the queue ready
to be spilled, avoid re-materializing it".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56837 91177308-0d34-0410-b5e6-96231b3b80d8
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change the register operand's spill weight to HUGE_VAL to avoid it being spilled. However, if the operand is already in the queue ready to be spilled, avoid re-materializing it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56835 91177308-0d34-0410-b5e6-96231b3b80d8
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RA problem by expanding the live interval of an
earlyclobber def back one slot. Remove
overlap-earlyclobber throughout. Remove
earlyclobber bits and their handling from
live internals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56539 91177308-0d34-0410-b5e6-96231b3b80d8
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Check bits for preferred register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56384 91177308-0d34-0410-b5e6-96231b3b80d8
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around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56381 91177308-0d34-0410-b5e6-96231b3b80d8
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have previously been assigned conflicting physreg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56364 91177308-0d34-0410-b5e6-96231b3b80d8
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and redo as linked list walk. Logic moved into RA.
Per review feedback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56326 91177308-0d34-0410-b5e6-96231b3b80d8
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with an earlyclobber operand elsewhere. Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way
that conflicts with an earlyclobber. See also comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56290 91177308-0d34-0410-b5e6-96231b3b80d8
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preference register is not in the right register class. This can happen due to sub-register coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56006 91177308-0d34-0410-b5e6-96231b3b80d8
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appropriate for cases where std::vector is still used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54820 91177308-0d34-0410-b5e6-96231b3b80d8
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the r2iMap_ by value. This will prevent references to them from being invalidated
if the map is changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54763 91177308-0d34-0410-b5e6-96231b3b80d8
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forgot
to multiply the instruction count by a constant factor in a few places, which
caused the register allocator to require many more iterations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53959 91177308-0d34-0410-b5e6-96231b3b80d8
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live intervals itself to use an instruction count approximation that is
not affected by inserting empty indices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53937 91177308-0d34-0410-b5e6-96231b3b80d8
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as a questionable case, but the code isn't actually needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52657 91177308-0d34-0410-b5e6-96231b3b80d8
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picking the register with the lowest spill weight. Consider (up to) 2 additional registers with spill weights that are close to the lowest spill weight. The one with fewest defs and uses that conflicts with the current interval (weighted by loop depth) is the spill candidate.
This is not always a win, but there are much more wins than loses and wins tend to be more noticeable.
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backtracking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49544 91177308-0d34-0410-b5e6-96231b3b80d8
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around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting.
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instead of init'ing it maximally to zeros on entry. getFreePhysReg
is pretty hot and only a few elements are typically used. This speeds
up linscan by 5% on 176.gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47631 91177308-0d34-0410-b5e6-96231b3b80d8
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would have been a Godsend here!
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preserved.
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that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.
Update all the clients to match.
This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45467 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44838 91177308-0d34-0410-b5e6-96231b3b80d8
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When a live interval is being spilled, rather than creating short, non-spillable
intervals for every def / use, split the interval at BB boundaries. That is, for
every BB where the live interval is defined or used, create a new interval that
covers all the defs and uses in the BB.
This is designed to eliminate one common problem: multiple reloads of the same
value in a single basic block. Note, it does *not* decrease the number of spills
since no copies are inserted so the split intervals are *connected* through
spill and reloads (or rematerialization). The newly created intervals can be
spilled again, in that case, since it does not span multiple basic blocks, it's
spilled in the usual manner. However, it can reuse the same stack slot as the
previously split interval.
This is currently controlled by -split-intervals-at-bb.
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