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No functional change, just moved header files.
Targets can inject custom passes between register allocation and
rewriting. This makes it possible to tweak the register allocation
before rewriting, using the full global interference checking available
from LiveRegMatrix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168806 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168751 91177308-0d34-0410-b5e6-96231b3b80d8
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r168627), we no longer need to call the freezeReservedRegs() function a second
time. Previously, this pass was conservatively adding the FP to the set of
reserved registers, requiring the second update to the reserved registers.
rdar://12719844
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168630 91177308-0d34-0410-b5e6-96231b3b80d8
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They are living in LiveRegMatrix now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158868 91177308-0d34-0410-b5e6-96231b3b80d8
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Stop using the LiveIntervalUnions provided by RegAllocBase, they will be
removed soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158866 91177308-0d34-0410-b5e6-96231b3b80d8
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That is a DenseMap iterator keyed by pointers, so the iteration order is
nondeterministic.
I would like to replace the DenseMap with an IndexedMap which doesn't
allow iteration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158856 91177308-0d34-0410-b5e6-96231b3b80d8
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This deduplicates some code from the optimizing register allocators, and
it means that it is now possible to change the register allocators'
solutions simply by editing the VirtRegMap between the register
allocator pass and the rewriter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158249 91177308-0d34-0410-b5e6-96231b3b80d8
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It is useful outside RegAllocBase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158041 91177308-0d34-0410-b5e6-96231b3b80d8
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Soon we'll be making LiveIntervalUnions for register units as well.
This was the only place using the RepReg member, so just remove it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158038 91177308-0d34-0410-b5e6-96231b3b80d8
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Don't print out the register number and spill weight, making the TRI
argument unnecessary.
This allows callers to interpret the reg field. It can currently be a
virtual register, a physical register, a spill slot, or a register unit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158031 91177308-0d34-0410-b5e6-96231b3b80d8
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No functional change intended.
Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in the future. The TableGen-produced
register lists are getting quite large, and it may be necessary to
change the table representation.
This makes it possible to do so without changing all clients (again).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
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Empty live ranges represent undef and still get allocated, but they
won't appear in LiveIntervalUnions.
Patch by Patrik Hägglund!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156685 91177308-0d34-0410-b5e6-96231b3b80d8
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backend, not just libCodeGen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153906 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
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This helper method is too simplistic for RAGreedy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147976 91177308-0d34-0410-b5e6-96231b3b80d8
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No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147972 91177308-0d34-0410-b5e6-96231b3b80d8
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