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path: root/lib/CodeGen/PostRASchedulerList.cpp
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2010-12-24Various bits of framework needed for precise machine-level selectionAndrew Trick
DAG scheduling during isel. Most new functionality is currently guarded by -enable-sched-cycles and -enable-sched-hazard. Added InstrItineraryData::IssueWidth field, currently derived from ARM itineraries, but could be initialized differently on other targets. Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is active, and if so how many cycles of state it holds. Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry into the scheduler's available queue. ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to get information about it's SUnits, provides RecedeCycle for bottom-up scheduling, correctly computes scoreboard depth, tracks IssueCount, and considers potential stall cycles when checking for hazards. ScheduleDAGRRList now models machine cycles and hazards (under flags). It tracks MinAvailableCycle, drives the hazard recognizer and priority queue's ready filter, manages a new PendingQueue, properly accounts for stall cycles, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122541 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-10Teach if-converter to be more careful with predicating instructions that wouldEvan Cheng
take multiple cycles to decode. For the current if-converter clients (actually only ARM), the instructions that are predicated on false are not nops. They would still take machine cycles to decode. Micro-coded instructions such as LDM / STM can potentially take multiple cycles to decode. If-converter should take treat them as non-micro-coded simple instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113570 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06Reapply r110396, with fixes to appease the Linux buildbot gods.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110460 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06Revert r110396 to fix buildbots.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110410 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-05Don't use PassInfo* as a type identifier for passes. Instead, use the ↵Owen Anderson
address of the static ID member as the sole unique type identifier. Clean up APIs related to this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110396 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-15Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108450 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Allow ARM if-converter to be run after post allocation scheduling.Evan Cheng
- This fixed a number of bugs in if-converter, tail merging, and post-allocation scheduler. If-converter now runs branch folding / tail merging first to maximize if-conversion opportunities. - Also changed the t2IT instruction slightly. It now defines the ITSTATE register which is read by instructions in the IT block. - Added Thumb2 specific hazard recognizer to ensure the scheduler doesn't change the instruction ordering in the IT block (since IT mask has been finalized). It also ensures no other instructions can be scheduled between instructions in the IT block. This is not yet enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106344 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-14- Do away with SimpleHazardRecognizer.h. It's not used and offers little value.Evan Cheng
- Rename ExactHazardRecognizer to PostRAHazardRecognizer and move its header to include to allow targets to extend it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105959 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-12Allow target to provide its own hazard recognizer to post-ra scheduler.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105862 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21- Change MachineInstr::findRegisterDefOperandIdx so it can also look for defsEvan Cheng
that are aliases of the specified register. - Rename modifiesRegister to definesRegister since it's looking a def of the specific register or one of its super-registers. It's not looking for def of a sub-register or alias that could change the specified register. - Added modifiesRegister to look for defs of aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20Remove dbg_value workaround and associated command line optionJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104254 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19Enable preserving debug information through post-RA schedulingJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104175 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-1480 column and trailing whitespace cleanupJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103806 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14add cmd line option to leave dbgvalues in during post-RA sceduling. UsefulJim Grosbach
while debugging what's mishandled about them in the post-RA pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103805 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-01Get rid of the EdgeMapping map. Instead, just check for BasicBlockDan Gohman
changes before doing phi lowering for switches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102809 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17As a temporary workaround for post-RA not handling DebugValue instructions,Bob Wilson
just remove them all. Radar 7873207 (working around the root problem of Radar 7759363). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101604 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-12Remove a #include.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101043 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05Fix some more places where dbg_value affected codegen.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97765 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05Change errs() to dbgs().David Greene
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92594 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-09<rdar://problem/7453528>. Track only physical registers that are valid for ↵David Goodwin
the target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90970 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03Don't hang on to pointers or references after vector::push_back.Jakob Stoklund Olesen
The MO reference to a MachineOperand can be invalidated by MachineInstr::addOperand. Don't even use it for debugging. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90381 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20Remove some old experimental code that is no longer needed. Remove ↵David Goodwin
additional, speculative scheduling pass as its cost did not translate into significant performance improvement. Minor tweaks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89471 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13Allow target to specify regclass for which antideps will only be broken ↵David Goodwin
along the critical path. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88682 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12Rename registers to break output dependencies in addition to anti-dependencies.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87015 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10Fixed to address code review. No functional changes.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86634 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10Allow targets to specify register classes whose member registers should not ↵David Goodwin
be renamed to break anti-dependencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86628 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-05Break anti-dependencies using free registers in a round-robin manner to ↵David Goodwin
avoid introducing new anti-dependencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86098 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03Do a scheduling pass ignoring anti-dependencies to identify candidate ↵David Goodwin
registers that should be renamed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85939 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31Make -print-machineinstrs more readable.Dan Gohman
- Be consistent when referring to MachineBasicBlocks: BB#0. - Be consistent when referring to virtual registers: %reg1024. - Be consistent when referring to unknown physical registers: %physreg10. - Be consistent when referring to known physical registers: %RAX - Be consistent when referring to register 0: %reg0 - Be consistent when printing alignments: align=16 - Print jump table contents. - Don't print host addresses, in general. - and various other cleanups. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85682 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28Make AntiDepReg.h internal.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85412 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26Allow the aggressive anti-dep breaker to process the same region multiple ↵David Goodwin
times. This is necessary because new anti-dependencies are exposed when "current" ones are broken. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85166 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26Define virtual destructor in *.cpp file.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85146 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26Add aggressive anti-dependence breaker. Currently it is not the default for ↵David Goodwin
any target. Enable with -break-anti-dependencies=all. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85145 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26Break anti-dependence breaking out into its own class.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85127 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25Remove includes of Support/Compiler.h that are no longer needed after theNick Lewycky
VISIBILITY_HIDDEN removal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85043 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.Nick Lewycky
Chris claims we should never have visibility_hidden inside any .cpp file but that's still not true even after this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85042 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22Allow the target to select the level of anti-dependence breaking that should ↵David Goodwin
be performed by the post-RA scheduler. The default is none. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84911 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21Revert r84658 and r84691. They were causing llvm-gcc bootstrap to fail.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84727 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20Respect src register allocation requirements when breaking ↵David Goodwin
anti-dependencies. Remove some dead code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84691 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20Checkpoint more aggressive anti-dependency breaking for post-ra scheduler.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84658 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16Change createPostRAScheduler so it can be turned off at llc -O1.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84273 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16If post-alloc scheduler is not enabled, it should return false, not true.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84248 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-13Add debugging output.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84011 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-10Fix a missing initialization of PostRAScheduler's AA member.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83695 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09Factor out LiveIntervalAnalysis' code to determine whether an instructionDan Gohman
is trivially rematerializable and integrate it into TargetInstrInfo::isTriviallyReMaterializable. This way, all places that need to know whether an instruction is rematerializable will get the same answer. This enables the useful parts of the aggressive-remat option by default -- using AliasAnalysis to determine whether a memory location is invariant, and removes the questionable parts -- rematting operations with virtual register inputs that may not be live everywhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83687 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-02Fix a use-after-free in post-ra-scheduling.Benjamin Kramer
MI->addOperand invalidates references to it's operands, avoid touching the operand after a new one was added. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83249 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-01All callee-saved registers are live-out of a return block.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83223 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-01Remove neonfp attribute and instead set default based on CPU string. Add ↵David Goodwin
-arm-use-neon-fp to override the default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83218 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-01Restore the -post-RA-scheduler flag as an override for the target ↵David Goodwin
specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83215 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-01Use MachineFrameInfo.getPristineRegs() to determine which callee-saved ↵David Goodwin
registers are available for anti-dependency breaking. Some cleanup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83208 91177308-0d34-0410-b5e6-96231b3b80d8
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