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path: root/lib/CodeGen/LiveInterval.cpp
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2010-01-12Fix a comment typo.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93261 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-04Change errs() to dbgs().David Greene
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92528 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-09Added a new "splitting" spiller.Lang Hames
When a call is placed to spill an interval this spiller will first try to break the interval up into its component values. Single value intervals and intervals which have already been split (or are the result of previous splits) are spilled by the default spiller. Splitting intervals as described above may improve the performance of generated code in some circumstances. This work is experimental however, and it still miscompiles many benchmarks. It's not recommended for general use yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90951 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03The Indexes Patch.Lang Hames
This introduces a new pass, SlotIndexes, which is responsible for numbering instructions for register allocation (and other clients). SlotIndexes numbering is designed to match the existing scheme, so this patch should not cause any changes in the generated code. For consistency, and to avoid naming confusion, LiveIndex has been renamed SlotIndex. The processImplicitDefs method of the LiveIntervals analysis has been moved into its own pass so that it can be run prior to SlotIndexes. This was necessary to match the existing numbering scheme. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-03Oops. Renamed remaining MachineInstrIndex references.Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83255 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-03Renamed MachineInstrIndex to LiveIndex.Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83254 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-12Moved some more index operations over to LiveIntervals.Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81605 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-04Replaces uses of unsigned for indexes in LiveInterval and VNInfo withLang Hames
a new class, MachineInstrIndex, which hides arithmetic details from most clients. This is a step towards allowing the register allocator to update/insert code during allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81040 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-23shoot a few more std::ostream print methods in the head.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79814 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10Modified VNInfo. The "copy" member is now a union which holds the copy for a ↵Lang Hames
register interval, or the defining register for a stack interval. Access is via getCopy/setCopy and getReg/setReg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78620 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24More move to raw_ostream.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76966 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24Move more to raw_ostream, provide support for writing MachineBasicBlock,Daniel Dunbar
LiveInterval, etc to raw_ostream. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76965 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22Reorder if-else branches as suggested by Bill.David Greene
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76808 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22Make some changes suggested by Bill and Evan.David Greene
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76775 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21Add some support for iterative coalescers to calculate a joined liveDavid Greene
range's weight properly. This is turned off right now in the sense that you'll get an assert if you get into a situation that can only be caused by an iterative coalescer. All other code paths operate exactly as before so there is no functional change with this patch. The asserts should be disabled if/when an iterative coalescer gets added to trunk. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76680 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09Improved tracking of value number kills. VN kills are now representedLang Hames
as an (index,bool) pair. The bool flag records whether the kill is a PHI kill or not. This code will be used to enable splitting of live intervals containing PHI-kills. A slight change to live interval weights introduced an extra spill into lsr-code-insertion (outside the critical sections). The test condition has been updated to reflect this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75097 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24Fixed a bug in LiveInterval scaling (failure to scale VNI defs correctly), ↵Lang Hames
removed old TODO comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74054 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-17VNInfo cleanup.Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73634 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15Part 1.Evan Cheng
- Change register allocation hint to a pair of unsigned integers. The hint type is zero (which means prefer the register specified as second part of the pair) or entirely target dependent. - Allow targets to specify alternative register allocation orders based on allocation hint. Part 2. - Use the register allocation hint system to implement more aggressive load / store multiple formation. - Aggressively form LDRD / STRD. These are formed *before* register allocation. It has to be done this way to shorten live interval of base and offset registers. e.g. v1025 = LDR v1024, 0 v1026 = LDR v1024, 0 => v1025,v1026 = LDRD v1024, 0 If this transformation isn't done before allocation, v1024 will overlap v1025 which means it more difficult to allocate a register pair. - Even with the register allocation hint, it may not be possible to get the desired allocation. In that case, the post-allocation load / store multiple pass must fix the ldrd / strd instructions. They can either become ldm / stm instructions or back to a pair of ldr / str instructions. This is work in progress, not yet enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73381 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-14Move register allocation preference (or hint) from LiveInterval to ↵Evan Cheng
MachineRegisterInfo. This allows more passes to set them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73346 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-02Update to in-place spilling framework. Includes live interval scaling and ↵Lang Hames
trivial rewriter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72729 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28Fix PR4034. Bug in LiveInterval::join when it's compacting new valno's.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70291 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27Also delete last unused val#.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70212 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-25Reuse unused val#'s to avoid running out of memory in extreme cases.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70069 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-25Do not share a single unknown val# for all the live ranges merged into a ↵Evan Cheng
physical sub-register live interval. When coalescer is merging in clobbered virtaul register live interval into a physical register live interval, give each virtual register val# a separate val# in the physical register live interval. Otherwise, the coalescer would have lost track of the definitions information it needs to make correct coalescing decisions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70026 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-18Add a new LiveInterval::overlaps(). It checks if the live interval overlaps ↵Evan Cheng
a range specified by [Start, End). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69434 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08Implement support for using modeling implicit-zero-extension on x86-64Dan Gohman
with SUBREG_TO_REG, teach SimpleRegisterCoalescing to coalesce SUBREG_TO_REG instructions (which are similar to INSERT_SUBREG instructions), and teach the DAGCombiner to take advantage of this on targets which support it. This eliminates many redundant zero-extension operations on x86-64. This adds a new TargetLowering hook, isZExtFree. It's similar to isTruncateFree, except it only applies to actual definitions, and not no-op truncates which may not zero the high bits. Also, this adds a new optimization to SimplifyDemandedBits: transform operations like x+y into (zext (add (trunc x), (trunc y))) on targets where all the casts are no-ops. In contexts where the high part of the add is explicitly masked off, this allows the mask operation to be eliminated. Fix the DAGCombiner to avoid undoing these transformations to eliminate casts on targets where the casts are no-ops. Also, this adds a new two-address lowering heuristic. Since two-address lowering runs before coalescing, it helps to be able to look through copies when deciding whether commuting and/or three-address conversion are profitable. Also, fix a bug in LiveInterval::MergeInClobberRanges. It didn't handle the case that a clobber range extended both before and beyond an existing live range. In that case, multiple live ranges need to be added. This was exposed by the new subreg coalescing code. Remove 2008-05-06-SpillerBug.ll. It was bugpoint-reduced, and the spiller behavior it was looking for no longer occurrs with the new instruction selection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68576 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-11Two coalescer fixes in one.Evan Cheng
1. Use the same value# to represent unknown values being merged into sub-registers. 2. When coalescer commute an instruction and the destination is a physical register, update its sub-registers by merging in the extended ranges. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66610 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02MergeValueInto is too smart: it might choose to do the merge the opposite ↵Owen Anderson
direction. Live interval reconstruction needs to account for this, and scour its maps to prevent dangling references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63558 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-29Exit with nice warnings when register allocator run out of registers.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63267 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-29Fix comment about removeRange.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63255 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24Next round of earlyclobber handling. Approach theDale Johannesen
RA problem by expanding the live interval of an earlyclobber def back one slot. Remove overlap-earlyclobber throughout. Remove earlyclobber bits and their handling from live internals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56539 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysisDale Johannesen
and redo as linked list walk. Logic moved into RA. Per review feedback. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56326 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-14Use empty() instead of begin() == end().Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54780 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-23Instead of adding an isSS field to LiveInterval to denote stack slot. Use ↵Evan Cheng
top bit of 'reg' instead. If the top bit is set, than the LiveInterval represents a stack slot live interval. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52639 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-04Add a stack slot coloring pass. Not yet enabled.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51934 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26Rename PrintableName to Name.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47629 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26Change "Name" to "AsmName" in the target register info. Gee, a refactoring toolBill Wendling
would have been a Godsend here! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47625 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-20Update gcc 4.3 warnings fix patch with recent head changesAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47368 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-15- Removing the infamous r2rMap_ and rep() method. Now the coalescer will updateEvan Cheng
register defs and uses after each successful coalescing. - Also removed a number of hacks and fixed some subtle kill information bugs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47167 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-13- Added removeValNo() to remove all live ranges of a particular value#.Evan Cheng
- removeRange() can now update value# information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47044 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-10Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-30Fixed a bug in MergeValueInAsValue() pointed out by David Greene. Replace ↵Evan Cheng
val# with previous liverange's. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46579 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-14remove dead #includeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45971 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29Remove attribution from file headers, per discussion on llvmdev.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-29Replace the odd kill# hack with something less fragile.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44434 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-29Kill info update bug.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44427 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-17Fix MergeValueInAsValue(). It allows overlapping live ranges but should replaceEvan Cheng
their value numbers with the specified value number. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43062 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14When coalescing an EXTRACT_SUBREG and the dst register is a physical register,Evan Cheng
the source register will be coalesced to the super register of the LHS. Properly merge in the live ranges of the resulting coalesced interval that were part of the original source interval to the live interval of the super-register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42961 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG likeEvan Cheng
(almost) a register copy. However, it always coalesced to the register of the RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub- register uses which adds subtle complications to load folding, spiller rewrite, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42899 91177308-0d34-0410-b5e6-96231b3b80d8
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