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path: root/lib/CodeGen/BranchFolding.cpp
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2012-02-15Handle register masks in branch folding.Jakob Stoklund Olesen
Don't attempt to move instructions with regmask operands. They are most likely calls anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150634 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08Move pass configuration out of pass constructors: BranchFolderPassAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150095 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150094 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-20More dead code removal (using -Wunreachable-code)David Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148578 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12When hoisting common code, watch out for uses which are marked "kill". If theEvan Cheng
killed registers are needed below the insertion point, then unset the kill marker. Sorry I'm not able to find a reduced test case. rdar://10660944 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148043 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-07Revert part of r147716. Looks like x87 instructions kill markers are all messedEvan Cheng
up so branch folding pass can't use the scavenger. :-( This doesn't breaks anything currently. It just means targets which do not carefully update kill markers cannot run post-ra scheduler (not new, it has always been the case). We should fix this at some point since it's really hacky. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147719 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-07Added a late machine instruction copy propagation pass. This catchesEvan Cheng
opportunities that only present themselves after late optimizations such as tail duplication .e.g. ## BB#1: movl %eax, %ecx movl %ecx, %eax ret The register allocator also leaves some of them around (due to false dep between copies from phi-elimination, etc.) This required some changes in codegen passes. Post-ra scheduler and the pseudo-instruction expansion passes have been moved after branch folding and tail merging. They were before branch folding before because it did not always update block livein's. That's fixed now. The pass change makes independently since we want to properly schedule instructions after branch folding / tail duplication. rdar://10428165 rdar://10640363 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147716 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14- Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a functionEvan Cheng
to finalize MI bundles (i.e. add BUNDLE instruction and computing register def and use lists of the BUNDLE instruction) and a pass to unpack bundles. - Teach more of MachineBasic and MachineInstr methods to be bundle aware. - Switch Thumb2 IT block to MI bundles and delete the hazard recognizer hack to prevent IT blocks from being broken apart. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146542 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07Add bundle aware API for querying instruction properties and switch the codeEvan Cheng
generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26Reapply r142920 with fix:Bill Wendling
An MBB which branches to an EH landing pad shouldn't be considered for tail merging. In SjLj EH, the jump to the landing pad is not done explicitly through a branch statement. The EH landing pad is added as a successor to the throwing BB. Because of that however, the branch folding pass could mistakenly think that it could merge the throwing BB with another BB. This isn't safe to do. <rdar://problem/10334833> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143001 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-25Revert commit 142891. Takumi bisected the tablegen miscompilesDuncan Sands
down to this commit. Original commit message: An MBB which branches to an EH landing pad shouldn't be considered for tail merging. In SjLj EH, the jump to the landing pad is not done explicitly through a branch statement. The EH landing pad is added as a successor to the throwing BB. Because of that however, the branch folding pass could mistakenly think that it could merge the throwing BB with another BB. This isn't safe to do. <rdar://problem/10334833> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142920 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-25An MBB which branches to an EH landing pad shouldn't be considered for tail ↵Bill Wendling
merging. In SjLj EH, the jump to the landing pad is not done explicitly through a branch statement. The EH landing pad is added as a successor to the throwing BB. Because of that however, the branch folding pass could mistakenly think that it could merge the throwing BB with another BB. This isn't safe to do. <rdar://problem/10334833> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142891 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-05Fix liveness computations in BranchFolding.Jakob Stoklund Olesen
The old code would look at kills and defs in one pass over the instruction operands, causing problems with this code: %R0<def>, %CPSR<def,dead> = tLSLri %R5<kill>, 2, pred:14, pred:%noreg %R0<def>, %CPSR<def,dead> = tADDrr %R4<kill>, %R0<kill>, pred:14, %pred:%noreg The last instruction kills and redefines %R0, so it is still live after the instruction. This caused a register scavenger crash when compiling 483.xalancbmk for armv6. I am not including a test case because it requires too much bad luck to expose this old bug. First you need to convince the register allocator to use %R0 twice on the tADDrr instruction, then you have to convince BranchFolding to do something that causes it to run the register scavenger on he bad block. <rdar://problem/9898200> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136973 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06When tail-merging multiple blocks, make sure to correctly update the live-in ↵Eli Friedman
list on the merged block to correctly account for the live-outs of all the predecessors. They might not be the same in all cases (the testcase I have involves a PHI node where one of the operands is an IMPLICIT_DEF). Unfortunately, the testcase I have is large and confidential, so I don't have a test to commit at the moment; I'll see if I can come up with something smaller where this issue reproduces. <rdar://problem/9716278> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134565 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng
sink them into MC layer. - Added MCInstrInfo, which captures the tablegen generated static data. Chang TargetInstrInfo so it's based off MCInstrInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14Add 132986 back, but avoid non-determinism if a bb address gets reused.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14revert 132986 to see if the bots go green.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132988 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14Make the threshold used by branch folding softer. Before we would get aRafael Espindola
sharp all or nothing transition when one extra predecessor was added. Now we still test first ones for merging. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132974 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26Add comment.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132149 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26During branch folding avoid inserting redundant DBG_VALUE machine instructions.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132148 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-12Update comment.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131258 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-12Re-enable branchfolding common code hoisting optimization. Fixed a liveness ↵Evan Cheng
test bug and also taught it to update liveins. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131241 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-12Temporarily disable the transformation. It's breaking 186.crafty in some ↵Evan Cheng
configuration. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131235 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-12Re-commit 131172 with fix. MachineInstr identity checks should check deadEvan Cheng
markers. In some cases a register def is dead on one path, but not on another. This is passing Clang self-hosting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131214 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11Revert 131172 as it is causing clang to miscompile itself. I will tryRafael Espindola
to provide a reduced testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131176 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11Add a late optimization to BranchFolding that hoist common instruction sequencesEvan Cheng
at the start of basic blocks to their common predecessor. It's actually quite common (e.g. about 50 times in JM/lencod) and has shown to be a nice code size benefit. e.g. pushq %rax testl %edi, %edi jne LBB0_2 ## BB#1: xorb %al, %al popq %rdx ret LBB0_2: xorb %al, %al callq _foo popq %rdx ret => pushq %rax xorb %al, %al testl %edi, %edi je LBB0_2 ## BB#1: callq _foo LBB0_2: popq %rdx ret rdar://9145558 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131172 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22Branch folding is folding a landing pad into a regular BB.Bill Wendling
An exception is thrown via a call to _cxa_throw, which we don't expect to return. Therefore, the "true" part of the invoke goes to a BB that has 'unreachable' as its only instruction. This is lowered into an empty MachineBB. The landing pad for this invoke, however, is directly after the "true" MBB. When the empty MBB is removed, the landing pad is directly below the BB with the invoke call. The unconditional branch is removed and then the two blocks are merged together. The testcase is too big for a regression test. <rdar://problem/9305728> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129965 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-21Add more debugging output.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126158 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06Reapply r110396, with fixes to appease the Linux buildbot gods.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110460 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06Revert r110396 to fix buildbots.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110410 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-05Don't use PassInfo* as a type identifier for passes. Instead, use the ↵Owen Anderson
address of the static ID member as the sole unique type identifier. Clean up APIs related to this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110396 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22Tail merging pass shall not break up IT blocks. rdar://8115404Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106517 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Allow ARM if-converter to be run after post allocation scheduling.Evan Cheng
- This fixed a number of bugs in if-converter, tail merging, and post-allocation scheduler. If-converter now runs branch folding / tail merging first to maximize if-conversion opportunities. - Also changed the t2IT instruction slightly. It now defines the ITSTATE register which is read by instructions in the IT block. - Added Thumb2 specific hazard recognizer to ensure the scheduler doesn't change the instruction ordering in the IT block (since IT mask has been finalized). It also ensures no other instructions can be scheduled between instructions in the IT block. This is not yet enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106344 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings
addresses a longstanding deficiency noted in many FIXMEs scattered across all the targets. This effectively moves the problem up one level, replacing eleven FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path through FastISel where we actually supply a DebugLoc, fixing Radar 7421831. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-03Fix a bug which prevented tail merging of return instructions inDan Gohman
beneficial cases. See the changes in test/CodeGen/X86/tail-opts.ll and test/CodeGen/ARM/ifcvt2.ll for details. The fix is to change HashEndOfMBB to hash at most one instruction, instead of trying to apply heuristics about when it will be profitable to consider more than one instruction. The regular tail-merging heuristics are already prepared to handle the same cases, and they're more precise. Also, make test/CodeGen/ARM/ifcvt5.ll and test/CodeGen/Thumb2/thumb2-branch.ll slightly more complex so that they continue to test what they're intended to test. And, this eliminates the problem in test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll, the testcase from PR5204. Update it accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102907 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02Teach AnalyzeBranch, RemoveBranch and the branchDale Johannesen
folder to be tolerant of debug info following the branch(es) at the end of a block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100168 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19Stop trying to merge identical jump tables. This had been inadvertentlyBob Wilson
disabled for several months (since svn r88806) and no one noticed. My fix for pr6543 yesterday reenabled it, but broke the ARM port's code for using TBB/TBH. Rather than adding a target hook to disable merging for Thumb2 only, I'm just taking this out. It is not common to have identical jump tables, the code we used to merge them was O(N^2), and it only helps code size, not performance. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98977 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16Remove a check that can no longer be true, after r84803.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98694 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14eliminate InvalidateLabel and LabelIDList from MMI and replaceChris Lattner
them with a counter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98462 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-10Fix another place where DEBUG_VALUE affected codegen.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98181 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-10This survived a bootstrap, so let's try 98104 again.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98137 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-10Speculatively revert 98104; could be what's causing crashesDale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98108 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-09Ever more complicated DEBUG_VALUE fixes for branch folding.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98104 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-08Fix dbg value handling in tail merging.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97938 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05Fix some more places where dbg_value affected codegen.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97765 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09move target-independent opcodes out of TargetInstrInfoChris Lattner
into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-25Rearrange handling of jump tables. Highlights:Chris Lattner
1. MachineJumpTableInfo is now created lazily for a function the first time it actually makes a jump table instead of for every function. 2. The encoding of jump table entries is now described by the MachineJumpTableInfo::JTEntryKind enum. This enum is determined by the TLI::getJumpTableEncoding() hook, instead of by lots of code scattered throughout the compiler that "knows" that jump table entries are always 32-bits in pic mode (for example). 3. The size and alignment of jump table entries is now calculated based on their kind, instead of at machinefunction creation time. Future work includes using the EntryKind in more places in the compiler, eliminating other logic that "knows" the layout of jump tables in various situations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94470 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-24Change errs() to dbgs().David Greene
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92097 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16Initialize uninitialized variables.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91477 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16Initialize uninitialized variables.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91475 91177308-0d34-0410-b5e6-96231b3b80d8
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