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2013-01-30Merge commit 'a662a9862501fc86904e90054f7c1519101d9126'Derek Schuff
Conflicts: include/llvm/CodeGen/IntrinsicLowering.h include/llvm/MC/MCAssembler.h include/llvm/MC/MCObjectStreamer.h lib/LLVMBuild.txt lib/Linker/LinkArchives.cpp lib/MC/MCAssembler.cpp lib/MC/MCELFStreamer.cpp lib/MC/MCParser/AsmParser.cpp lib/MC/MCPureStreamer.cpp lib/MC/WinCOFFStreamer.cpp lib/Makefile lib/Support/Unix/Memory.inc lib/Support/Unix/Process.inc lib/Support/Unix/Program.inc lib/Target/ARM/ARM.h lib/Target/ARM/ARMFastISel.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp lib/Target/Mips/MipsInstrFPU.td lib/Target/X86/CMakeLists.txt lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86TargetMachine.cpp lib/Target/X86/X86TargetObjectFile.cpp lib/Transforms/InstCombine/InstCombineCalls.cpp test/CodeGen/X86/fast-isel-x86-64.ll tools/llc/llc.cpp tools/lto/LTOModule.cpp utils/TableGen/EDEmitter.cpp
2013-01-11Merge commit '1ad9253c9d34ccbce3e7e4ea5d87c266cbf93410'Derek Schuff
deplib features commented out due to removal upstream; will add back as a localmod Conflicts: include/llvm/ADT/Triple.h include/llvm/MC/MCAssembler.h include/llvm/Target/TargetFrameLowering.h lib/CodeGen/AsmPrinter/DwarfDebug.cpp lib/CodeGen/AsmPrinter/DwarfDebug.h lib/CodeGen/BranchFolding.cpp lib/LLVMBuild.txt lib/Linker/LinkArchives.cpp lib/MC/MCAssembler.cpp lib/MC/MCELFStreamer.cpp lib/Makefile lib/Target/ARM/ARMExpandPseudoInsts.cpp lib/Target/ARM/ARMFrameLowering.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMSubtarget.h lib/Target/ARM/ARMTargetObjectFile.cpp lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp lib/Target/Mips/MipsInstrFPU.td lib/Target/Mips/MipsInstrInfo.td lib/Target/X86/X86CodeEmitter.cpp lib/Target/X86/X86Subtarget.h lib/VMCore/Module.cpp test/MC/MachO/ARM/nop-armv4-padding.s tools/Makefile tools/llc/llc.cpp tools/lto/LTOModule.cpp tools/lto/lto.cpp
2013-01-02Move all of the header files which are involved in modelling the LLVM IRChandler Carruth
into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-30Remove the Function::getFnAttributes method in favor of using the AttributeSetBill Wendling
directly. This is in preparation for removing the use of the 'Attribute' class as a collection of attributes. That will shift to the AttributeSet class instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171253 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19Rename the 'Attributes' class to 'Attribute'. It's going to represent a ↵Bill Wendling
single attribute in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170502 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03Use the new script to sort the includes of every file under lib.Chandler Carruth
Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27Remove unneeded #include.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168670 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-11Merge commit '2fa8af224ea026f9432e833fd6f42a216423a010'Derek Schuff
Conflicts: lib/ExecutionEngine/JIT/JITEmitter.cpp lib/MC/MCELFStreamer.cpp lib/Target/ARM/ARMAsmPrinter.h lib/Target/X86/X86RegisterInfo.td lib/Target/X86/X86TargetMachine.cpp tools/llc/llc.cpp
2012-10-09Create enums for the different attributes.Bill Wendling
We use the enums to query whether an Attributes object has that attribute. The opaque layer is responsible for knowing where that specific attribute is stored. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165488 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-07Fix indentation. Remove 'else' after return. No functional change.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165381 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-01Merge commit '72f0976c1b91c7ba50dce4d0ad0289dc14d37f81'Derek Schuff
Conflicts: lib/Target/ARM/ARMISelDAGToDAG.cpp lib/Target/Mips/MipsISelLowering.cpp lib/Target/Mips/MipsSubtarget.cpp
2012-09-26Remove the `hasFnAttr' method from Function.Bill Wendling
The hasFnAttr method has been replaced by querying the Attributes explicitly. No intended functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164725 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-18Merge commit '8e70b5506ec0d7a6c2740bc89cd1b8f12a78b24f'Derek Schuff
Conflicts: include/llvm/CodeGen/ISDOpcodes.h include/llvm/Target/Target.td include/llvm/Target/TargetLowering.h include/llvm/Target/TargetOpcodes.h lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp lib/Target/Mips/MipsMCInstLower.cpp utils/TableGen/CodeGenTarget.cpp
2012-08-22Reduce duplicated hash map lookups.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162362 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-09LOCALMODs from hg 0b098ca44de7 against r158408 (hg 90a87d6bfe45)Derek Schuff
(only non-new files; new files in git 4f429c8b) Change-Id: Ia39f818088485bd90e4d048db404f8d6ba5f836b
2012-06-02Fix typos found by http://github.com/lyda/misspell-checkBenjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157885 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Switch all register list clients to the new MC*Iterator interface.Jakob Stoklund Olesen
No functional change intended. Sorry for the churn. The iterator classes are supposed to help avoid giant commits like this one in the future. The TableGen-produced register lists are getting quite large, and it may be necessary to change the table representation. This makes it possible to do so without changing all clients (again). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Switch some getAliasSet clients to MCRegAliasIterator.Jakob Stoklund Olesen
MCRegAliasIterator can optionally visit the register itself, allowing for simpler code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157837 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-23Forgot to reverse conditional.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157349 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-23Reduce indentation by early detection of 'continue'. No functionality change.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157348 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23This patch fixes a problem which arose when using the Post-RA schedulerPreston Gurd
on X86 Atom. Some of our tests failed because the tail merging part of the BranchFolding pass was creating new basic blocks which did not contain live-in information. When the anti-dependency code in the Post-RA scheduler ran, it would sometimes rename the register containing the function return value because the fact that the return value was live-in to the subsequent block had been lost. To fix this, it is necessary to run the RegisterScavenging code in the BranchFolding pass. This patch makes sure that the register scavenging code is invoked in the X86 subtarget only when post-RA scheduling is being done. Post RA scheduling in the X86 subtarget is only done for Atom. This patch adds a new function to the TargetRegisterClass to control whether or not live-ins should be preserved during branch folding. This is necessary in order for the anti-dependency optimizations done during the PostRASchedulerList pass to work properly when doing Post-RA scheduling for the X86 in general and for the Intel Atom in particular. The patch adds and invokes the new function trackLivenessAfterRegAlloc() instead of using the existing requiresRegisterScavenging(). It changes BranchFolding.cpp to call trackLivenessAfterRegAlloc() instead of requiresRegisterScavenging(). It changes the all the targets that implemented requiresRegisterScavenging() to also implement trackLivenessAfterRegAlloc(). It adds an assertion in the Post RA scheduler to make sure that post RA liveness information is available when it is needed. It changes the X86 break-anti-dependencies test to use –mcpu=atom, in order to avoid running into the added assertion. Finally, this patch restores the use of anti-dependency checking (which was turned off temporarily for the 3.1 release) for Intel Atom in the Post RA scheduler. Patch by Andy Zhang! Thanks to Jakob and Anton for their reviews. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155395 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-27Branch folding may invalidate liveness.Jakob Stoklund Olesen
Branch folding can use a register scavenger to update liveness information when required. Don't do that if liveness information is already invalid. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153517 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07Where the BranchFolding pass removes a branch then adds another better branch,Bill Wendling
the DebugLoc information can be maintained throughout by grabbing the DebugLoc before the RemoveBranch and then passing the result to the InsertBranch. Patch by Andrew Stanford-Jason! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152212 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-05Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce ↵Craig Topper
static data size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152016 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-04Use uint16_t to store register overlaps to reduce static data.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Remove extra semi-colons.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151169 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15Handle register masks in branch folding.Jakob Stoklund Olesen
Don't attempt to move instructions with regmask operands. They are most likely calls anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150634 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08Move pass configuration out of pass constructors: BranchFolderPassAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150095 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150094 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-20More dead code removal (using -Wunreachable-code)David Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148578 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12When hoisting common code, watch out for uses which are marked "kill". If theEvan Cheng
killed registers are needed below the insertion point, then unset the kill marker. Sorry I'm not able to find a reduced test case. rdar://10660944 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148043 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-07Revert part of r147716. Looks like x87 instructions kill markers are all messedEvan Cheng
up so branch folding pass can't use the scavenger. :-( This doesn't breaks anything currently. It just means targets which do not carefully update kill markers cannot run post-ra scheduler (not new, it has always been the case). We should fix this at some point since it's really hacky. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147719 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-07Added a late machine instruction copy propagation pass. This catchesEvan Cheng
opportunities that only present themselves after late optimizations such as tail duplication .e.g. ## BB#1: movl %eax, %ecx movl %ecx, %eax ret The register allocator also leaves some of them around (due to false dep between copies from phi-elimination, etc.) This required some changes in codegen passes. Post-ra scheduler and the pseudo-instruction expansion passes have been moved after branch folding and tail merging. They were before branch folding before because it did not always update block livein's. That's fixed now. The pass change makes independently since we want to properly schedule instructions after branch folding / tail duplication. rdar://10428165 rdar://10640363 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147716 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14- Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a functionEvan Cheng
to finalize MI bundles (i.e. add BUNDLE instruction and computing register def and use lists of the BUNDLE instruction) and a pass to unpack bundles. - Teach more of MachineBasic and MachineInstr methods to be bundle aware. - Switch Thumb2 IT block to MI bundles and delete the hazard recognizer hack to prevent IT blocks from being broken apart. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146542 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07Add bundle aware API for querying instruction properties and switch the codeEvan Cheng
generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26Reapply r142920 with fix:Bill Wendling
An MBB which branches to an EH landing pad shouldn't be considered for tail merging. In SjLj EH, the jump to the landing pad is not done explicitly through a branch statement. The EH landing pad is added as a successor to the throwing BB. Because of that however, the branch folding pass could mistakenly think that it could merge the throwing BB with another BB. This isn't safe to do. <rdar://problem/10334833> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143001 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-25Revert commit 142891. Takumi bisected the tablegen miscompilesDuncan Sands
down to this commit. Original commit message: An MBB which branches to an EH landing pad shouldn't be considered for tail merging. In SjLj EH, the jump to the landing pad is not done explicitly through a branch statement. The EH landing pad is added as a successor to the throwing BB. Because of that however, the branch folding pass could mistakenly think that it could merge the throwing BB with another BB. This isn't safe to do. <rdar://problem/10334833> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142920 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-25An MBB which branches to an EH landing pad shouldn't be considered for tail ↵Bill Wendling
merging. In SjLj EH, the jump to the landing pad is not done explicitly through a branch statement. The EH landing pad is added as a successor to the throwing BB. Because of that however, the branch folding pass could mistakenly think that it could merge the throwing BB with another BB. This isn't safe to do. <rdar://problem/10334833> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142891 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-05Fix liveness computations in BranchFolding.Jakob Stoklund Olesen
The old code would look at kills and defs in one pass over the instruction operands, causing problems with this code: %R0<def>, %CPSR<def,dead> = tLSLri %R5<kill>, 2, pred:14, pred:%noreg %R0<def>, %CPSR<def,dead> = tADDrr %R4<kill>, %R0<kill>, pred:14, %pred:%noreg The last instruction kills and redefines %R0, so it is still live after the instruction. This caused a register scavenger crash when compiling 483.xalancbmk for armv6. I am not including a test case because it requires too much bad luck to expose this old bug. First you need to convince the register allocator to use %R0 twice on the tADDrr instruction, then you have to convince BranchFolding to do something that causes it to run the register scavenger on he bad block. <rdar://problem/9898200> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136973 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06When tail-merging multiple blocks, make sure to correctly update the live-in ↵Eli Friedman
list on the merged block to correctly account for the live-outs of all the predecessors. They might not be the same in all cases (the testcase I have involves a PHI node where one of the operands is an IMPLICIT_DEF). Unfortunately, the testcase I have is large and confidential, so I don't have a test to commit at the moment; I'll see if I can come up with something smaller where this issue reproduces. <rdar://problem/9716278> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134565 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng
sink them into MC layer. - Added MCInstrInfo, which captures the tablegen generated static data. Chang TargetInstrInfo so it's based off MCInstrInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14Add 132986 back, but avoid non-determinism if a bb address gets reused.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14revert 132986 to see if the bots go green.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132988 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14Make the threshold used by branch folding softer. Before we would get aRafael Espindola
sharp all or nothing transition when one extra predecessor was added. Now we still test first ones for merging. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132974 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26Add comment.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132149 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26During branch folding avoid inserting redundant DBG_VALUE machine instructions.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132148 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-12Update comment.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131258 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-12Re-enable branchfolding common code hoisting optimization. Fixed a liveness ↵Evan Cheng
test bug and also taught it to update liveins. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131241 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-12Temporarily disable the transformation. It's breaking 186.crafty in some ↵Evan Cheng
configuration. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131235 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-12Re-commit 131172 with fix. MachineInstr identity checks should check deadEvan Cheng
markers. In some cases a register def is dead on one path, but not on another. This is passing Clang self-hosting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131214 91177308-0d34-0410-b5e6-96231b3b80d8
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