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2013-04-06Don't use InMemoryStruct in getSymbolTableEntry.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178945 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-06Don't use InMemoryStruct in getRelocation.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178943 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05Reapply r178845 with fix - Fix bug in PEI's virtual-register scavengingHal Finkel
This fixes PEI as previously described, but correctly handles the case where the instruction defining the virtual register to be scavenged is the first in the block. Arnold provided me with a bugpoint-reduced test case, but even that seems too large to use as a regression test. If I'm successful in cleaning it up then I'll commit that as well. Original commit message: This change fixes a bug that I introduced in r178058. After a register is scavenged using one of the available spills slots the instruction defining the virtual register needs to be moved to after the spill code. The scavenger has already processed the defining instruction so that registers killed by that instruction are available for definition in that same instruction. Unfortunately, after this, the scavenger needs to iterate through the spill code and then visit, again, the instruction that defines the now-scavenged register. In order to avoid confusion, the register scavenger needs the ability to 'back up' through the spill code so that it can again process the instructions in the appropriate order. Prior to this fix, once the scavenger reached the just-moved instruction, it would assert if it killed any registers because, having already processed the instruction, it believed they were undefined. Unfortunately, I don't yet have a small test case. Thanks to Pranav Bhandarkar for diagnosing the problem and testing this fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178919 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05Use the target options specified on a function to reset the back-end.Bill Wendling
During LTO, the target options on functions within the same Module may change. This would necessitate resetting some of the back-end. Do this for X86, because it's a Friday afternoon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178917 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05Revert r178845 - Fix bug in PEI's virtual-register scavengingHal Finkel
Reverting because this breaks one of the LTO builders. Original commit message: This change fixes a bug that I introduced in r178058. After a register is scavenged using one of the available spills slots the instruction defining the virtual register needs to be moved to after the spill code. The scavenger has already processed the defining instruction so that registers killed by that instruction are available for definition in that same instruction. Unfortunately, after this, the scavenger needs to iterate through the spill code and then visit, again, the instruction that defines the now-scavenged register. In order to avoid confusion, the register scavenger needs the ability to 'back up' through the spill code so that it can again process the instructions in the appropriate order. Prior to this fix, once the scavenger reached the just-moved instruction, it would assert if it killed any registers because, having already processed the instruction, it believed they were undefined. Unfortunately, I don't yet have a small test case. Thanks to Pranav Bhandarkar for diagnosing the problem and testing this fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178916 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05Define versions of Section that are explicitly marked as little endian.Rafael Espindola
These should really be templated like ELF, but this is a start. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178896 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05Don't use InMemoryStruct in getSection and getSection64.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178894 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05Don't fetch pointers from a InMemoryStruct.Rafael Espindola
InMemoryStruct is extremely dangerous as it returns data from an internal buffer when the endiannes doesn't match. This should fix the tests on big endian hosts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178875 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05Fix bug in PEI's virtual-register scavengingHal Finkel
This change fixes a bug that I introduced in r178058. After a register is scavenged using one of the available spills slots the instruction defining the virtual register needs to be moved to after the spill code. The scavenger has already processed the defining instruction so that registers killed by that instruction are available for definition in that same instruction. Unfortunately, after this, the scavenger needs to iterate through the spill code and then visit, again, the instruction that defines the now-scavenged register. In order to avoid confusion, the register scavenger needs the ability to 'back up' through the spill code so that it can again process the instructions in the appropriate order. Prior to this fix, once the scavenger reached the just-moved instruction, it would assert if it killed any registers because, having already processed the instruction, it believed they were undefined. Unfortunately, I don't yet have a small test case. Thanks to Pranav Bhandarkar for diagnosing the problem and testing this fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178845 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05Clean up some confusing language, and use more realistic examples.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178828 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-04CostModel: Add parameter to instruction cost to further classify operand valuesArnold Schwaighofer
On certain architectures we can support efficient vectorized version of instructions if the operand value is uniform (splat) or a constant scalar. An example of this is a vector shift on x86. We can efficiently support for (i = 0 ; i < ; i += 4) w[0:3] = v[0:3] << <2, 2, 2, 2> but not for (i = 0; i < ; i += 4) w[0:3] = v[0:3] << x[0:3] This patch adds a parameter to getArithmeticInstrCost to further qualify operand values as uniform or uniform constant. Targets can then choose to return a different cost for instructions with such operand values. A follow-up commit will test this feature on x86. radar://13576547 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178807 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-04Revert r178713Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178769 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-04Document the return value of SmallSet insert.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178742 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-03Make it possible to include llvm-c without including C++ headers. Patch by ↵Evan Cheng
Filip Pizlo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178713 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-03Implement the "mips endian" for r_info.Rafael Espindola
Normally r_info is just a 32 of 64 bit number matching the endian of the rest of the file. Unfortunately, mips 64 bit little endian is special: The top 32 bits are a little endian number and the following 32 are a big endian one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178694 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-03Implements low-level object file format specific output for COFF andEric Christopher
ELF with support for: - File headers - Section headers + data - Relocations - Symbols - Unwind data (only COFF/Win64) The output format follows a few rules: - Values are almost always output one per line (as elf-dump/coff-dump already do). - Many values are translated to something readable (like enum names), with the raw value in parentheses. - Hex numbers are output in uppercase, prefixed with "0x". - Flags are sorted alphabetically. - Lists and groups are always delimited. Example output: ---------- snip ---------- Sections [ Section { Index: 1 Name: .text (5) Type: SHT_PROGBITS (0x1) Flags [ (0x6) SHF_ALLOC (0x2) SHF_EXECINSTR (0x4) ] Address: 0x0 Offset: 0x40 Size: 33 Link: 0 Info: 0 AddressAlignment: 16 EntrySize: 0 Relocations [ 0x6 R_386_32 .rodata.str1.1 0x0 0xB R_386_PC32 puts 0x0 0x12 R_386_32 .rodata.str1.1 0x0 0x17 R_386_PC32 puts 0x0 ] SectionData ( 0000: 83EC04C7 04240000 0000E8FC FFFFFFC7 |.....$..........| 0010: 04240600 0000E8FC FFFFFF31 C083C404 |.$.........1....| 0020: C3 |.| ) } ] ---------- snip ---------- Relocations and symbols can be output standalone or together with the section header as displayed in the example. This feature set supports all tests in test/MC/COFF and test/MC/ELF (and I suspect all additional tests using elf-dump), making elf-dump and coff-dump deprecated. Patch by Nico Rieck! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178679 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-03Implement sectionContainsSymbol for ELF.Eric Christopher
Patch by Nico Rieck! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178677 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-03When dumping clear the arm/thumb flag for now.Eric Christopher
Patch by Nico Rieck! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178676 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-02Add MDBuilder utilities for path-aware TBAA.Manman Ren
Add utilities to create struct nodes in TBAA type DAG and to create path-aware tags. The format of struct nodes in TBAA type DAG: a unique name, a list of fields with field offsets and field types. The format of path-aware tags: a base type in TBAA type DAG, an access type and an offset relative to the base type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178564 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-02Count processor resources individually in MachineTraceMetrics.Jakob Stoklund Olesen
The new instruction scheduling models provide information about the number of cycles consumed on each processor resource. This makes it possible to estimate ILP more accurately than simply counting instructions / issue width. The functions getResourceDepth() and getResourceLength() now identify the limiting processor resource, and return a cycle count based on that. This gives more precise resource information, particularly in traces that use one resource a lot more than others. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178553 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-01unindent the file to follow coding standards, change class doc commentChris Lattner
to be correct. No functionality or behavior change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178511 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-01Mips direct object exception handling regressionJack Carter
Revision 177141 caused a regression in all but mips64 little endian. That is because none of the other Mips targets had test cases checking the contents of the .eh_frame section. This patch fixes both the llvm code and adds an assembler test case to include the current 4 flavors. The test cases unfortunately rely on llvm-objdump. A preferable method would be to use a pretty printer output such as what readelf -wf <elf_file> would give. I also changed the name of the test case to correct a typo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178506 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-01PNaCl: Allow the ABI checker to be used from "opt"Mark Seaborn
This allows the ABI checker passes to be used in the same way as LLVM's "-verify" pass. It allows the checker to be run between other passes, and without launching pnacl-abicheck as a separate process (so without the overhead of reading bitcode into memory again). Make the ABI checker passes produce fatal errors by default, to match "-verify". This is overridden for pnacl-abicheck's use. BUG=https://code.google.com/p/nativeclient/issues/detail?id=2309 TEST=tested with pnacl-ld.py changes to use the ABI checker passes Review URL: https://codereview.chromium.org/13323006
2013-04-01Add support for vector data types in the LLVM interpreter.Nadav Rotem
Patch by: Veselov, Yuri <Yuri.Veselov@intel.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178469 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-01Whitespace cleanupJoe Abbey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178454 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-30Object: Turn a couple of degenerate for loops into while loops.Benjamin Kramer
No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178413 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-29PNaCl: Fix ExpandTls to handle a couple of corner cases involving PHI nodesMark Seaborn
ExpandTls's use of replaceUsesOfWith() didn't work for PHI nodes containing the same Constant twice (which needs to work for same or differing incoming BasicBlocks). The same applies to ExpandTlsConstantExpr. I noticed this while implementing ExpandConstantExpr. Fix this and factor out some common code that all three passes can use. BUG=https://code.google.com/p/nativeclient/issues/detail?id=2837 TEST=test/Transforms/NaCl/*.ll Review URL: https://codereview.chromium.org/13128002
2013-03-29SmallVector and SmallPtrSet allocations now power-of-two aligned.Jean-Luc Duprat
This time tested on both OSX and Linux. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178377 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-29Remove the old CodePlacementOpt pass.Benjamin Kramer
It was superseded by MachineBlockPlacement and disabled by default since LLVM 3.1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178349 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-29Revert "Fix allocations of SmallVector and SmallPtrSet so they are more ↵Rafael Espindola
prone to" This reverts commit 617330909f0c26a3f2ab8601a029b9bdca48aa61. It broke the bots: /home/clangbuild2/clang-ppc64-2/llvm.src/unittests/ADT/SmallVectorTest.cpp:150: PushPopTest /home/clangbuild2/clang-ppc64-2/llvm.src/unittests/ADT/SmallVectorTest.cpp:118: Failure Value of: v[i].getValue() Actual: 0 Expected: value Which is: 2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178334 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-29Fix allocations of SmallVector and SmallPtrSet so they are more prone toJean-Luc Duprat
being power-of-two sized. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178332 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Add a pass to strip bitcode metadata.Jan Voung
This only works on instruction attachments for now. Since it is a ModulePass we can add something to strip NamedMetadata based on a whitelist, if we want to retain some of that. It does not touch debug metadata, and leaves -strip-debug to handle that. BUG= https://code.google.com/p/nativeclient/issues/detail?id=3348 Review URL: https://codereview.chromium.org/12844027
2013-03-28Add support of RDSEED defined in AVX2 extensionMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178314 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Seciton 24.2.2 of the C++ standard, [iterator.iterators], Table 106Howard Hinnant
requires that the return type of *r for all iterators r be reference, where reference is defined in [iterator.requirements.general]/p11 as iterator_traits<X>::reference, and X is the type of r. But in CFG.h, the dereference operator of PredIterator and SuccIterator return pointer, not reference. Furthermore the nested type reference is value_type&, which is not the type returned from operator*(). This patch simply makes the iterator::reference type value_type*, which is what the operator*() returns, and then re-lables the return type as reference. From a functionality point of view, the only difference is that the nested reference type is now value_type* instead of value_type&. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178240 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Revert "Updated ELF relocation test for .eh_frame section"Michael Gottesman
This reverts commit c8d65364223a04b179958a50a4bf0f89b21dd7d2. This broke a bunch of the buildbots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178222 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Revert "Adding DIImportedModules to DIScopes."David Blaikie
This reverts commit 342d92c7a0adeabc9ab00f3f0d88d739fe7da4c7. Turns out we're going with a different schema design to represent DW_TAG_imported_modules so we won't need this extra field. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178215 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Updated ELF relocation test for .eh_frame sectionJack Carter
Made sure we were looking a correct section Added Mips32/64 as an extra check Updated llvm-objdump to generate symbolic info for Mips relocations git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178190 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Add a boolean parameter to the llvm::report_fatal_error() function to indicatedChad Rosier
if crash diagnostics should be generated. By default this is enabled. Part of rdar://13296693 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178161 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Cleanup the simplify_type implementation.Rafael Espindola
As far as simplify_type is concerned, there are 3 kinds of smart pointers: * const correct: A 'const MyPtr<int> &' produces a 'const int*'. A 'MyPtr<int> &' produces a 'int *'. * always const: Even a 'MyPtr<int> &' produces a 'const int*'. * no const: Even a 'const MyPtr<int> &' produces a 'int*'. This patch then does the following: * Removes the unused specializations. Since they are unused, it is hard to know which kind should be implemented. * Make sure we don't drop const. * Fix the default forwarding so that const correct pointer only need one specialization. * Simplifies the existing specializations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178147 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Adding DIImportedModules to DIScopes.David Blaikie
This is just the basic groundwork for supporting DW_TAG_imported_module but I wanted to commit this before pushing support further into Clang or LLVM so that this rather churny change is isolated from the rest of the work. The major churn here is obviously adding another field (within the common DIScope prefix) to all DIScopes (files, classes, namespaces, lexical scopes, etc). This should be the last big churny change needed for DW_TAG_imported_module/using directive support/PR14606. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178099 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-26Make DIBuilder::createClassType more type safe by returning DICompositeType ↵David Blaikie
rather than DIType git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178091 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-26DebugInfo: more support for mutating DICompositeType to reduce magic number ↵David Blaikie
usage in Clang git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178090 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-26Add a boolean parameter to the ExecuteAndWait static function to indicatedChad Rosier
if execution failed. ExecuteAndWait returns -1 upon an execution failure, but checking the return value isn't sufficient because the wait command may return -1 as well. This new parameter is to be used by the clang driver in a subsequent commit. Part of rdar://13362359 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178087 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-26Add XTEST codegen supportMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178083 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-26Debug Info: Provide a means to update the members of a composite typeDavid Blaikie
This will be used to factor out some uses of magic number operand offsets inside Clang where these fields were updated in an effort to resolve forward declarations/circular references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178078 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-26Fix the register scavenger for targets that provide custom spillingHal Finkel
As pointed out by Richard Sandiford, my recent updates to the register scavenger broke targets that use custom spilling (because the new code assumed that if there were no valid spill slots, than spilling would be impossible). I don't have a test case, but it should be possible to create one for Thumb 1, Mips 16, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178073 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-26PNaCl: Add ExpandGetElementPtr pass for converting GetElementPtr to arithmeticMark Seaborn
This is similar to the GEP handling in visitGetElementPtr() in lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp. Once this pass is enabled, it will simplify the language to reduce the set of constructs that a PNaCl translator needs to handle as part of a stable wire format for PNaCl. BUG=https://code.google.com/p/nativeclient/issues/detail?id=3343 TEST=test/Transforms/NaCl/expand-getelementptr.ll Review URL: https://codereview.chromium.org/12849009
2013-03-26Update PEI's virtual-register-based scavenging to support multiple ↵Hal Finkel
simultaneous mappings The previous algorithm could not deal properly with scavenging multiple virtual registers because it kept only one live virtual -> physical mapping (and iterated through operands in order). Now we don't maintain a current mapping, but rather use replaceRegWith to completely remove the virtual register as soon as the mapping is established. In order to allow the register scavenger to return a physical register killed by an instruction for definition by that same instruction, we now call RS->forward(I) prior to eliminating virtual registers defined in I. This requires a minor update to forward to ignore virtual registers. These new features will be tested in forthcoming commits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178058 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-26PowerPC: Simplify handling of fixups.Ulrich Weigand
MCTargetDesc/PPCMCCodeEmitter.cpp current has code like: if (isSVR4ABI() && is64BitMode()) Fixups.push_back(MCFixup::Create(0, MO.getExpr(), (MCFixupKind)PPC::fixup_ppc_toc16)); else Fixups.push_back(MCFixup::Create(0, MO.getExpr(), (MCFixupKind)PPC::fixup_ppc_lo16)); This is a problem for the asm parser, since it requires knowledge of the ABI / 64-bit mode to be set up. However, more fundamentally, at this point we shouldn't make such distinctions anyway; in an assembler file, it always ought to be possible to e.g. generate TOC relocations even when the main ABI is one that doesn't use TOC. Fortunately, this is actually completely unnecessary; that code was added to decide whether to generate TOC relocations, but that information is in fact already encoded in the VariantKind of the underlying symbol. This commit therefore merges those fixup types into one, and then decides which relocation to use based on the VariantKind. No changes in generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178007 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-26Fix SCEV forgetMemoizedResults should search and destroy backedge exprs.Andrew Trick
Fixes PR15570: SEGV: SCEV back-edge info invalid after dead code removal. Indvars creates a SCEV expression for the loop's back edge taken count, then determines that the comparison is always true and removes it. When loop-unroll asks for the expression, it contains a NULL SCEVUnknkown (as a CallbackVH). forgetMemoizedResults should invalidate the loop back edges expression. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177986 91177308-0d34-0410-b5e6-96231b3b80d8
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