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2012-06-29The DIBuilder class is just a wrapper around debug info creationBill Wendling
(a.k.a. MDNodes). The module doesn't belong in Analysis. Move it to the VMCore instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159414 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-29Revert "Make NumMicroOps a variable in the subtarget's instruction itinerary."Andrew Trick
This reverts commit r159406. I noticed a performance regression so I'll back out for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159411 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-29misched: count micro-ops toward the issue limit.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159407 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-29Make NumMicroOps a variable in the subtarget's instruction itinerary.Andrew Trick
The TargetInstrInfo::getNumMicroOps API does not change, but soon it will be used by MachineScheduler. Now each subtarget can specify the number of micro-ops per itinerary class. For ARM, this is currently always dynamic (-1), because it is used for load/store multiple which depends on the number of register operands. Zero is now a valid number of micro-ops. This can be used for nop pseudo-instructions or instructions that the hardware can squash during dispatch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159406 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-29X86: add more GATHER intrinsics in LLVMManman Ren
Corrected type for index of llvm.x86.avx2.gather.d.pd.256 from 256-bit to 128-bit. Corrected types for src|dst|mask of llvm.x86.avx2.gather.q.ps.256 from 256-bit to 128-bit. Support the following intrinsics: llvm.x86.avx2.gather.d.q, llvm.x86.avx2.gather.q.q llvm.x86.avx2.gather.d.q.256, llvm.x86.avx2.gather.q.q.256 llvm.x86.avx2.gather.d.d, llvm.x86.avx2.gather.q.d llvm.x86.avx2.gather.d.d.256, llvm.x86.avx2.gather.q.d.256 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159402 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28add a new @llvm.donothing intrinsic that, well, does nothing, and teach ↵Nuno Lopes
CodeGen to ignore calls to it git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159383 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28Fix hexagon gcc builtin names to use '_' instead of '.'.Benjamin Kramer
This way the generated GCC builtin to LLVM intrinsic converter actually works. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159370 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28Define MIPS DSP Rev1 intrinsics. That allows frontend to emit a correct IR.Simon Atanasyan
This patch was reviewed in the llvm-commits list by Jim Grosbach. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159364 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28MemoryBuiltins:Nuno Lopes
- recognize C++ new(std::nothrow) friends - ignore ExtractElement and ExtractValue instructions in size/offset analysis (all easy cases are probably folded away before we get here) - also recognize realloc as noalias git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159356 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28add ConstantRange::difference (to perform set difference/relative complement)Nuno Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159352 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28Devirtualize DIScope and subclasses.Benjamin Kramer
Nothing in here makes use of the virtuality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159349 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28Allow BBVectorize to form non-2^n-length vectors.Hal Finkel
The original algorithm only used recursive pair fusion of equal-length types. This is now extended to allow pairing of any types that share the same underlying scalar type. Because we would still generally prefer the 2^n-length types, those are formed first. Then a second set of iterations form the non-2^n-length types. Also, a call to SimplifyInstructionsInBlock has been added after each pairing iteration. This takes care of DCE (and a few other things) that make the following iterations execute somewhat faster. For the same reason, some of the simple shuffle-combination cases are now handled internally. There is some additional refactoring work to be done, but I've had many requests for this feature, so additional refactoring will come soon in future commits (as will additional test cases). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159330 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28Refactor operation equivalence checking in BBVectorize by extending ↵Hal Finkel
Instruction::isSameOperationAs. Maintaining this kind of checking in different places is dangerous, extending Instruction::isSameOperationAs consolidates this logic into one place. Here I've added an optional flags parameter and two flags that are important for vectorization: CompareIgnoringAlignment and CompareUsingScalarTypes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159329 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp andBill Wendling
include/llvm/Analysis/DebugInfo.h to include/llvm/DebugInfo.h. The reasoning is because the DebugInfo module is simply an interface to the debug info MDNodes and has nothing to do with analysis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159312 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27The ELF relocation record format is different for N64 Jack Carter
which many Mips 64 ABIs use than for O64 which many if not all other target ABIs use. Most architectures have the following 64 bit relocation record format: typedef struct { Elf64_Addr r_offset; /* Address of reference */ Elf64_Xword r_info; /* Symbol index and type of relocation */ } Elf64_Rel; typedef struct { Elf64_Addr r_offset; Elf64_Xword r_info; Elf64_Sxword r_addend; } Elf64_Rela; Whereas N64 has the following format: typedef struct { Elf64_Addr r_offset;/* Address of reference */ Elf64_Word r_sym; /* Symbol index */ Elf64_Byte r_ssym; /* Special symbol */ Elf64_Byte r_type3; /* Relocation type */ Elf64_Byte r_type2; /* Relocation type */ Elf64_Byte r_type; /* Relocation type */ } Elf64_Rel; typedef struct { Elf64_Addr r_offset;/* Address of reference */ Elf64_Word r_sym; /* Symbol index */ Elf64_Byte r_ssym; /* Special symbol */ Elf64_Byte r_type3; /* Relocation type */ Elf64_Byte r_type2; /* Relocation type */ Elf64_Byte r_type; /* Relocation type */ Elf64_Sxword r_addend; } Elf64_Rela; The structure is the same size, but the r_info data element is now 5 separate elements. Besides the content aspects, endian byte reordering will be different for the area with each element being endianized separately. I treat this as generic and continue to pass r_type as an integer masking and unmasking the byte sized N64 values for N64 mode. I've implemented this and it causes no affect on other current targets. This passes make check. Jack git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159299 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27Revert r159136 due to PR13124.Matt Beaumont-Gay
Original commit message: If a constant or a function has linkonce_odr linkage and unnamed_addr, mark it hidden. Being linkonce_odr guarantees that it is available in every dso that needs it. Being a constant/function with unnamed_addr guarantees that the copies don't have to be merged. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159272 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26Revamp how debugging information is emitted for debug info objects.Bill Wendling
It's not necessary for each DI class to have its own copy of `print' and `dump'. Instead, just give DIDescriptor those methods and have it call the appropriate debugging printing routine based on the type of the debug information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159237 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26X86: add GATHER intrinsics (AVX2) in LLVMManman Ren
Support the following intrinsics: llvm.x86.avx2.gather.d.pd, llvm.x86.avx2.gather.q.pd llvm.x86.avx2.gather.d.pd.256, llvm.x86.avx2.gather.q.pd.256 llvm.x86.avx2.gather.d.ps, llvm.x86.avx2.gather.q.ps llvm.x86.avx2.gather.d.ps.256, llvm.x86.avx2.gather.q.ps.256 Modified Disassembler to handle VSIB addressing mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159221 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26Allow targets to inject passes before the virtual register rewriter.Jakob Stoklund Olesen
Such passes can be used to tweak the register assignments in a target-dependent way, for example to avoid write-after-write dependencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159209 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26IntegersSubsetMapping: implemented "diff" operation. Operation allows at the ↵Stepan Dyatkovskiy
same time perform up to three operations: - LHS exclude RHS - LHS intersect RHS (LHS successors will keeped) - RHS exclude LHS The complexity is N+M, where N is size of LHS M is size of RHS. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159201 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26IntegersSubsetMapping: removed exclude operation, it will replaced with more ↵Stepan Dyatkovskiy
universal "diff" operation in next commit. Changes was separated onto two commits for better readability. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159200 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26Enable the new LoopInfo algorithm by default.Andrew Trick
The primary advantage is that loop optimizations will be applied in a stable order. This helps debugging and unit test creation. It is also a better overall implementation without pathologically bad performance on deep functions. On large functions (llvm-stress --size=200000 | opt -loops) Before: 0.1263s After: 0.0225s On deep functions (after tweaking llvm-stress, thanks Nadav): Before: 0.2281s After: 0.0227s See r158790 for more comments. The loop tree is now consistently generated in forward order, but loop passes are applied in reverse order over the program. If we have a loop optimization that prefers forward order, that can easily be achieved by adding a different type of LoopPassManager. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159183 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-25Define DAGOperand, an empty base class for RegisterClass and Operand. This ↵Owen Anderson
allows one to write multiclasses that are polymorphic over both registers and non-register operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159162 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-25add CallSite/CallInst/InvokeInst::hasFnAttr()Nuno Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159144 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-25If a constant or a function has linkonce_odr linkage and unnamed_addr, mark itRafael Espindola
hidden. Being linkonce_odr guarantees that it is available in every dso that needs it. Being a constant/function with unnamed_addr guarantees that the copies don't have to be merged. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159136 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-25The name (and comment describing) of llvm::GetFirstDebuigLocInBasicBlock no ↵Eli Bendersky
longer represents what the function does. Therefore, the function is removed and its functionality is folded into the only place in the code-base where it was being used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159133 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-25Just remove generic support for C++11 alignas -- GCC is alreadyChandler Carruth
advertising complete support w/o alignas implemented, and its implementation of alignas in the latest versions is so convoluted as to be unusable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159125 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-24Allow controlling vectorization of boolean values separately from other ↵Hal Finkel
integer types. These are used as the result of comparisons, and often handled differently from larger integer types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159111 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-24llvm/Support/IntegersSubset.h: Add a copy constructor on IntegersSubset to ↵NAKAMURA Takumi
appease msvc. msvc mis-infers ParentTy(RHS) to (const RangesCollectionTy &). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159101 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-24llvm/Support/IntegersSubset.h: Fix whitespace.NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159100 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-23Allow BBVectorize to fuse compare instructions.Hal Finkel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159088 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-23Add relocation types for Hexagon processor; patch by Sidney Manning ↵Marshall Clow
<sidneym@codeaurora.org> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159081 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-23Clean-up after r159077.Hans Wennborg
Remove temporary GlobalVariable constructors now that Clang has been updated (r159078). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159079 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-23Extend the IL for selecting TLS models (PR9788)Hans Wennborg
This allows the user/front-end to specify a model that is better than what LLVM would choose by default. For example, a variable might be declared as @x = thread_local(initialexec) global i32 42 if it will not be used in a shared library that is dlopen'ed. If the specified model isn't supported by the target, or if LLVM can make a better choice, a different model may be used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159077 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-23Optimized usage of new SwitchInst case values (IntegersSubset type) in ↵Stepan Dyatkovskiy
Local.cpp, Execution.cpp and BitcodeWriter.cpp. I got about 1% of compile-time improvement on my machines (Ubuntu 11.10 i386 and Ubuntu 12.04 x64). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159076 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22TableGen: AsmMatcher support for better operand diagnostics.Jim Grosbach
"Invalid operand" may be a completely correct diagnostic, but it's often insufficiently specific to really help identify and fix the problem in assembly source. Allow a target to specify a more-specific diagnostic kind for each AsmOperandClass derived definition and use that to provide more detailed diagnostics when an operant of that class resulted in a match failure. rdar://8987109 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159050 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Remove ProcessImplicitDefs.h which was unused.Jakob Stoklund Olesen
The ProcessImplicitDefs class can be local to its implementation file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159041 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Delete a boring statistic.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159030 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Store live intervals in an IndexedMap.Jakob Stoklund Olesen
It is both smaller and faster than DenseMap. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159029 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Revert r158679 - use case is unclear (and it increases the memory footprint).Hal Finkel
Original commit message: Allow up to 64 functional units per processor itinerary. This patch changes the type used to hold the FU bitset from unsigned to uint64_t. This will be needed for some upcoming PowerPC itineraries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159027 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22EmitZerofill should take a 64-bit size or else it's chopping off large ↵Evan Cheng
zero-filled global. rdar://11729134 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159023 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Stop computing physreg live ranges.Jakob Stoklund Olesen
Everyone is using on-demand regunit ranges now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159018 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Remove a variable that is unused when assertions aren't enabled.Kaelyn Uhrain
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159011 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Remove LiveIntervals::trackingRegUnits().Jakob Stoklund Olesen
With regunit liveness permanently enabled, this function would always return true. Also remove now obsolete code for checking physreg interference. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159006 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Change comment into proper Doxygen member comment.Dmitri Gribenko
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159000 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Fixed r158979.Stepan Dyatkovskiy
Original message: Performance optimizations: - SwitchInst: case values stored separately from Operands List. It allows to make faster access to individual case value numbers or ranges. - Optimized IntItem, added APInt value caching. - Optimized IntegersSubsetGeneric: added optimizations for cases when subset is single number or when subset consists from single numbers only. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158997 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Remove another duplicated variable. We only need one to tell us if the linkerRafael Espindola
knows dwarf or not. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158993 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Fix a FIXME: DwarfRequiresRelocationForSectionOffset is the same asRafael Espindola
DwarfUsesRelocationsAcrossSections. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158992 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Revert commit 158979 (dyatkovskiy) since it is causing several buildbots toDuncan Sands
fail. Original commit message: Performance optimizations: - SwitchInst: case values stored separately from Operands List. It allows to make faster access to individual case value numbers or ranges. - Optimized IntItem, added APInt value caching. - Optimized IntegersSubsetGeneric: added optimizations for cases when subset is single number or when subset consists from single numbers only. On my machine these optimizations gave about 4-6% of compile-time improvement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158986 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Performance optimizations:Stepan Dyatkovskiy
- SwitchInst: case values stored separately from Operands List. It allows to make faster access to individual case value numbers or ranges. - Optimized IntItem, added APInt value caching. - Optimized IntegersSubsetGeneric: added optimizations for cases when subset is single number or when subset consists from single numbers only. On my machine these optimizations gave about 4-6% of compile-time improvement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158979 91177308-0d34-0410-b5e6-96231b3b80d8
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