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2012-08-29Make use of the LLVM_DELETED_FUNCTION macro.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162828 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-29Maintain a vaild isTied bit as operands are added and removed.Jakob Stoklund Olesen
The isTied bit is set automatically when a tied use is added and MCInstrDesc indicates a tied operand. The tie is broken when one of the tied operands is removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162814 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-28Profile: set branch weight metadata with data generated from profiling.Manman Ren
This patch implements ProfileDataLoader which loads profile data generated by -insert-edge-profiling and updates branch weight metadata accordingly. Patch by Alastair Murray. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162799 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-28Add a MachineOperand::isTied() flag.Jakob Stoklund Olesen
While in SSA form, a MachineInstr can have pairs of tied defs and uses. The tied operands are used to represent read-modify-write operands that must be assigned the same physical register. Previously, tied operand pairs were computed from fixed MCInstrDesc fields, or by using black magic on inline assembly instructions. The isTied flag makes it possible to add tied operands to any instruction while getting rid of (some of) the inlineasm magic. Tied operands on normal instructions are needed to represent predicated individual instructions in SSA form. An extra <tied,imp-use> operand is required to represent the output value when the instruction predicate is false. Adding a predicate to: %vreg0<def> = ADD %vreg1, %vreg2 Will look like: %vreg0<tied,def> = ADD %vreg1, %vreg2, pred:3, %vreg7<tied,imp-use> The virtual register %vreg7 is the value given to %vreg0 when the predicate is false. It will be assigned the same physreg as %vreg0. This commit adds the isTied flag and sets it based on MCInstrDesc when building an instruction. The flag is not used for anything yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162774 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-28Don't allow TargetFlags on MO_Register MachineOperands.Jakob Stoklund Olesen
Register operands are manipulated by a lot of target-independent code, and it is not always possible to preserve target flags. That means it is not safe to use target flags on register operands. None of the targets in the tree are using register operand target flags. External targets should be using immediate operands to annotate instructions with operand modifiers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162770 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-28Remove extra MayLoad/MayStore flags from atomic_load/store.Jakob Stoklund Olesen
These extra flags are not required to properly order the atomic load/store instructions. SelectionDAGBuilder chains atomics as if they were volatile, and SelectionDAG::getAtomic() sets the isVolatile bit on the memory operands of all atomic operations. The volatile bit is enough to order atomic loads and stores during and after SelectionDAG. This means we set mayLoad on atomic_load, mayStore on atomic_store, and mayLoad+mayStore on the remaining atomic read-modify-write operations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162733 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-28Add the Freescale vendor to Triple.Hal Finkel
Adds the vendor 'fsl' (used by Freescale SDK) to Triple. This will allow clang support for Freescale cross-compile configurations. Patch by Tobias von Koch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162726 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-27Remove the the block_node_iterator of Region, replace it by the block_iterator.Hongbin Zheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162672 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-27Support MIPS DSP Rev2 intrinsics.Simon Atanasyan
The patch reviewed by Akira Hatanaka. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162668 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-27Add basic support for .debug_ranges section to LLVM's DebugInfo library.Alexey Samsonov
This section (introduced in DWARF-3) is used to define instruction address ranges for functions that are not contiguous and can't be described by low_pc/high_pc attributes (this is the usual case for inlined subroutines). The patch is the first step to support fetching complete inlining info from DWARF. Reviewed by Benjamin Kramer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162657 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-26Mark avx2 maskstore has ReadWriteArgMem. Mark broadcast and maskload as ↵Craig Topper
ReadArgMem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162649 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-24Fix integer undefined behavior due to signed left shift overflow in LLVM.Richard Smith
Reviewed offline by chandlerc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162623 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-24Remove llvm.nacl.tp.alignment intrinsicDerek Schuff
This intrinsic is no longer used by untrusted code's libpthread. Instead the system (the IRT and/or TCB) is responsible for aligning the stack in new threads. R= jvoung@chromium.org,sehr@chromium.org BUG= http://code.google.com/p/nativeclient/issues/detail?id=2924 TEST=run_stack_alignment_test Review URL: https://chromiumcodereview.appspot.com/10871069
2012-08-24Forgot to check in ProfileDataTypes.h in r162576Manman Ren
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162578 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-24Profile: move a single enum out of ProfileInfoTypes.h into a new Manman Ren
ProfileDataTypes.h header. With this patch the old and new profiling code can exist side-by-side. The new profiling code will be submitted soon and it only supports insert-edge-profiling for now and will not depend on ProfileInfo. Patch by Alastair Murray. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162576 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-24BranchProb: modify the definition of an edge in BranchProbabilityInfo to handleManman Ren
the case of multiple edges from one block to another. A simple example is a switch statement with multiple values to the same destination. The definition of an edge is modified from a pair of blocks to a pair of PredBlock and an index into the successors. Also set the weight correctly when building SelectionDAG from LLVM IR, especially when converting a Switch. IntegersSubsetMapping is updated to calculate the weight for each cluster. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162572 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-24Lower constant pools and jump tables via TOC on PPC64/SVR4.Roman Divacky
In collaboration with Adhemerval Zanella. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162562 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-24Try to appease MSVC even more elaborately in the alignment hacking space.Chandler Carruth
MSVC doesn't support passing by-value parameters with alignment of 16-bytes or higher apparantly. What is deeply confusing is that it seems to *sometimes* (but not always) apply this to any type whose alignment is set using __declspec(align(...)). This caused lots of errors when we switch SmallVector over to use the automatically aligned character array utilities as they used __declspec(align(...)) heavily. As a pretty horrible but effective work-around, we instead cherry pick the smallest alignment sizes with specific types that happen to have the correct alignment, and then fall back to the attribute solution past them. This should resolve the MSVC build errors folks have been hitting. Sorry for that. In good news, it will do this without introducing other UB I hope. =] Thanks to Timur Iskhodzhanov for helping me test this! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162549 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-23Remove the llvm.nacl.thread.stack.padding intrinsicMark Seaborn
This intrinsic is no longer used by untrusted code's libpthread. Instead the system (the IRT and/or TCB) is responsible for aligning the stack in new threads. BUG=http://code.google.com/p/nativeclient/issues/detail?id=2904 TEST=run_stack_alignment_test Review URL: https://chromiumcodereview.appspot.com/10874034
2012-08-23Tristate mayLoad, mayStore, and hasSideEffects.Jakob Stoklund Olesen
Keep track of the set/unset state of these bits along with their true/false values, but treat '?' as '0' for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162461 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-23Add CodeGenTarget::guessInstructionProperties.Jakob Stoklund Olesen
Currently, TableGen just guesses instruction properties when it can't infer them form patterns. This adds a guessInstructionProperties flag to the instruction set definition that will be used to disable guessing. The flag is intended as a migration aid. It will be removed again when no more targets need their properties guessed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162460 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-23Fix attributes on X86 store intrinsics.Jakob Stoklund Olesen
These intrinsics don't have unmodeled side effects, they are just stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162459 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-23Fix a stub signature. HeuristicReduce should return a bool.Lang Hames
This should fix a -Wdocumentation warning. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162458 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-23Fix a bunch of -Wdocumentation warnings.Dmitri Gribenko
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162446 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-23Make the setInst method take its MCInst parameter by reference, a la Jim'sLang Hames
change in r162404. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162431 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-23Simplify the computeOperandLatency API.Andrew Trick
The logic for recomputing latency based on a ScheduleDAG edge was shady. This bypasses the problem by requiring the client to provide operand indices. This ensures consistent use of the machine model's API. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162420 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22Fix an assortment of doxygen comment mistakes found by -Wdocumentation.Ted Kremenek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162411 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22Print out the location of expanded multiclass defs in TableGen errors.Jakob Stoklund Olesen
When reporting an error for a defm, we would previously only report the location of the outer defm, which is not always where the error is. Now we also print the location of the expanded multiclass defs: lib/Target/X86/X86InstrSSE.td:2902:12: error: foo defm ADD : basic_sse12_fp_binop_s<0x58, "add", fadd, SSE_ALU_ITINS_S>, ^ lib/Target/X86/X86InstrSSE.td:2801:11: note: instantiated from multiclass defm PD : sse12_fp_packed<opc, !strconcat(OpcodeStr, "pd"), OpNode, VR128, ^ lib/Target/X86/X86InstrSSE.td:194:5: note: instantiated from multiclass def rm : PI<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2), ^ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162409 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22MCInstFragment constructor should take by-reference MCInst.Jim Grosbach
The MCInst is immediately passed to the copy-constructor for local storage, so there's no need for the parameter itself to be by-value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162404 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22Add a getName function to MachineFunction. Use it in places that previously ↵Craig Topper
did getFunction()->getName(). Remove includes of Function.h that are no longer needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162347 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22For mips64 switch statements in subroutines could generate Jack Carter
within the codegen EK_GPRel64BlockAddress. This was not supported for direct object output and resulted in an assertion. This change adds support for EK_GPRel64BlockAddress for direct object. One fallout from this is to turn on rela relocations for mips64 to match gas. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162334 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Merge up to r162331, git commit bc363931085587bac42a40653962a3e5acd1ffceDerek Schuff
2012-08-22Reduce alignment of SmallVector<T> to the required amount, rather than ↵Richard Smith
forcing 16-byte alignment. This fixes misaligned SmallVector accesses via ExtractValueInst's SmallVector data member. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162331 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Add a few functions to TargetLibraryInfo as part of PR13574.Chad Rosier
Patch by Weiming Zhao <weimingz@codeaurora.org>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162329 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Fix misaligned access in MachO object file reader: despite containing anRichard Smith
int64_t, Symbol64TableEntry is actually only stored with 4-byte alignment within the file. The usage of #pragma pack here is copied from the corresponding code in Support/Endian.h, so shouldn't introduce any new portability problems. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162312 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21[ms-inline asm] Do not report a Parser error when matching inline assembly.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162306 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Provide a portability macro for __builtin_trap.David Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162300 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21[ms-inline asm] Expose the ErrorInfo from the MatchInstructionImpl. In general,Chad Rosier
this is the index of the operand that failed to match. Note: This may cause a buildbot failure due to an API mismatch in clang. Should recover with my next commit to clang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162295 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Pacify PVS-Studio by changing the type rather than doing a cast, a tweakDuncan Sands
suggested by David Blaikie. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162286 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Add support for the --param ssp-buffer-size= driver option.Chad Rosier
PR9673 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162284 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21PVS-Studio noticed that EmitVBR64 would perform undefined behaviour if theDuncan Sands
number of bits was bigger than 32. I checked every use of this function that I could find and it looks like the maximum number of bits is 32, so I've added an assertion checking this property, and a type cast to (hopefully) stop PVS-Studio from warning about this in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162277 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-20Fix a quadratic algorithm in MachineBranchProbabilityInfo.Jakob Stoklund Olesen
The getSumForBlock function was quadratic in the number of successors because getSuccWeight would perform a linear search for an already known iterator. This patch was originally committed as r161460, but reverted again because of assertion failures. Now that duplicate Machine CFG edges have been eliminated, this works properly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162233 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-20Clarify that duplicate edges are not allowed in the Machine CFG.Jakob Stoklund Olesen
LLVM IR has labeled duplicate CFG edges, but since Machine CFG edges don't have labels, it doesn't make sense to allow duplicates. There is no way of telling what the edges mean. Duplicate CFG edges cause confusion when dealing with edge weights. It seems that code producing duplicate CFG edges usually does the wrong thing with edge weights. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162227 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17Merge commit 'c723eb1aef817d47feec620933ee1ec6005cdd14'Derek Schuff
This merges r159618 from upstream into master. It goes with clang rev af50aab0c317462129d73ae8000c6394c718598d Conflicts: include/llvm/CodeGen/LexicalScopes.h include/llvm/Target/TargetOptions.h lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMTargetMachine.cpp lib/Target/ARM/ARMTargetObjectFile.cpp lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp lib/Target/Mips/MipsISelDAGToDAG.cpp lib/Target/Mips/MipsInstrFPU.td lib/Target/Mips/MipsMCInstLower.cpp lib/Target/Mips/MipsTargetMachine.cpp lib/Target/TargetMachine.cpp lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86RegisterInfo.cpp lib/Target/X86/X86TargetObjectFile.cpp lib/Target/X86/X86TargetObjectFile.h tools/llc/llc.cpp (tools/llc/llc.cpp is from a merged version of r160532 because it was a bit hairy and I didn't want to redo it.)
2012-08-17Correct MCJIT functionality for MIPS32 architecture.Akira Hatanaka
No new tests are added. All tests in ExecutionEngine/MCJIT that have been failing pass after this patch is applied (when "make check" is done on a mips board). Patch by Petar Jovanovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162135 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17Add stub methods for mips assembly matcher. Akira Hatanaka
Patch by Vladimir Medic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17MemoryBuiltins: Properly guard ObjectSizeOffsetVisitor against cycles in the IR.Benjamin Kramer
The previous fix only checked for simple cycles, use a set to catch longer cycles too. Drop the broken check from the ObjectSizeOffsetEvaluator. The BoundsChecking pass doesn't have to deal with invalid IR like InstCombine does. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162120 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17Change the `linker_private_weak_def_auto' linkage to `linkonce_odr_auto_hide' toBill Wendling
make it more consistent with its intended semantics. The `linker_private_weak_def_auto' linkage type was meant to automatically hide globals which never had their addresses taken. It has nothing to do with the `linker_private' linkage type, which outputs the symbols with a `l' (ell) prefix among other things. The intended semantic is more like the `linkonce_odr' linkage type. Change the name of the linkage type to `linkonce_odr_auto_hide'. And therefore changing the semantics so that it produces the correct output for the linker. Note: The old linkage name `linker_private_weak_def_auto' will still parse but is not a synonym for `linkonce_odr_auto_hide'. This should be removed in 4.0. <rdar://problem/11754934> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162114 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17Insertion of NoFolder functions to avoid ambiguous overload warnings or ↵Jin-Gu Kang
errors about whether to convert Idx to ArrayRef<Constant *> or ArrayRef<Value *> like ConstantFolder and TargetFolder. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162090 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17Test commit.Pranav Bhandarkar
include/llvm/IntrinsicsHexagon.td: Hexagon_Intrinsic is the base class for all Hexagon intrinsics and not altivec intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162087 91177308-0d34-0410-b5e6-96231b3b80d8
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