aboutsummaryrefslogtreecommitdiff
path: root/include/llvm
AgeCommit message (Collapse)Author
2012-11-14Remove the CellSPU port.Eric Christopher
Approved by Chris Lattner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167984 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14Fix comment.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167969 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14Remove DOS line endings.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167968 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14Fix commentAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167947 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14Revert some redundant parts of r142605.Patrik Hägglund
This seems like redundant leftovers from r142288 - exposing TargetData::parseSpecifier to LLParser - which got reverted. Removes redunant td != NULL checks in parseSpecifier, and simplifies the interface to parseSpecifier and init. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167924 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13Merge commit 'be02a90de17f857ba65bbd8a11653ca1bad30adc'Derek Schuff
Conflicts: lib/Target/Mips/MipsISelLowering.cpp lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86InstrFormats.td
2012-11-14Use TARGET2 relocation for TType references on ARM.Anton Korobeynikov
Do some cleanup of the code while here. Inspired by patch by Logan Chien! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167904 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13Revert "Use the 'count' attribute instead of the 'upper_bound' attribute."Eric Christopher
temporarily as it is breaking the gdb bots. This reverts commit r167806/e7ff4c14b157746b3e0228d2dce9f70712d1c126. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167886 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13Add (some) PowerPC TLS relocation types to ELF.h andUlrich Weigand
generate them from PPCELFObjectWriter::getRelocTypeInner as appropriate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167864 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13Adding changes to support GNU style archive library readingShankar Easwaran
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167853 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13Adding convenience function to ELF HeaderShankar Easwaran
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167852 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13Fix the instcombine GEP index widening transform to work correctly for vectorDuncan Sands
getelementptrs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167829 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13Relax the restrictions on vector of pointer types, and vector getelementptr.Duncan Sands
Previously in a vector of pointers, the pointer couldn't be any pointer type, it had to be a pointer to an integer or floating point type. This is a hassle for dragonegg because the GCC vectorizer happily produces vectors of pointers where the pointer is a pointer to a struct or whatever. Vector getelementptr was restricted to just one index, but now that vectors of pointers can have any pointer type it is more natural to allow arbitrary vector getelementptrs. There is however the issue of struct GEPs, where if each lane chose different struct fields then from that point on each lane will be working down into unrelated types. This seems like too much pain for too little gain, so when you have a vector struct index all the elements are required to be the same. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167828 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13misched: Allow subtargets to enable misched and dependent options.Andrew Trick
This allows me to begin enabling (or backing out) misched by default for one subtarget at a time. To run misched we typically want to: - Disable SelectionDAG scheduling (use the source order scheduler) - Enable more aggressive coalescing (until we decide to always run the coalescer this way) - Enable MachineScheduler pass itself. Disabling PostRA sched may follow for some subtargets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167826 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13instcombine: Migrate math library call simplificationsMeador Inge
This patch migrates the math library call simplifications from the simplify-libcalls pass into the instcombine library call simplifier. I have typically migrated just one simplifier at a time, but the math simplifiers are interdependent because: 1. CosOpt, PowOpt, and Exp2Opt all depend on UnaryDoubleFPOpt. 2. CosOpt, PowOpt, Exp2Opt, and UnaryDoubleFPOpt all depend on the option -enable-double-float-shrink. These two factors made migrating each of these simplifiers individually more of a pain than it would be worth. So, I migrated them all together. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167815 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13Remove virtual keyword for two routines that should never be overridden.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167812 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13Revert r167759. Ben is right this isn't likely to help much.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167809 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13misched: Don't consider artificial edges weak edges.Andrew Trick
For now be more conservative in case other out-of-tree schedulers rely on the old behavior of artificial edges. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167808 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13Use the 'count' attribute instead of the 'upper_bound' attribute.Bill Wendling
If we have a type 'int a[1]' and a type 'int b[0]', the generated DWARF is the same for both of them because we use the 'upper_bound' attribute. Instead use the 'count' attrbute, which gives the correct number of elements in the array. <rdar://problem/12566646> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167806 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-12Cache size of PassVector to speed up getNumContainedPasses().Evan Cheng
getNumContainedPasses() used to compute the size of the vector on demand. It is called repeated in loops (such as runOnFunction()) and it can be updated while inside the loop. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167759 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-12Rewrite DIContext interface to take an object. Update all callers.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167757 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-12misched: rename interfaceto avoid gcc warningsAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167753 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-12misched: Target-independent support for MacroFusion.Andrew Trick
Uses the infrastructure from r167742 to support clustering instructure that the target processor can "fuse". e.g. cmp+jmp. Next step: target hook implementations with test cases, and enable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167744 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-12misched: Target-independent support for load/store clustering.Andrew Trick
This infrastructure is generally useful for any target that wants to strongly prefer two instructions to be adjacent after scheduling. A following checkin will add target-specific hooks with unit tests. Then this feature will be enabled by default with misched. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167742 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-12misched: Infrastructure for weak DAG edges.Andrew Trick
This adds support for weak DAG edges to the general scheduling infrastructure in preparation for MachineScheduler support for heuristics based on weak edges. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167738 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-12Fixup for r167558: Store raw pointer (instead of reference) to RelocMap in ↵Alexey Samsonov
DIContext. This is needed to prevent crashes because of dangling reference if the clients don't provide RelocMap to DIContext constructor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167728 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-11Add method for replacing instructions to LibCallSimplifierMeador Inge
In some cases the library call simplifier may need to replace instructions other than the library call being simplified. In those cases it may be necessary for clients of the simplifier to override how the replacements are actually done. As such, a new overrideable method for replacing instructions was added to LibCallSimplifier. A new subclass of LibCallSimplifier is also defined which overrides the instruction replacement method. This is because the instruction combiner defines its own replacement method which updates the worklist when instructions are replaced. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167681 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-10Add more functions to the target library information.Meador Inge
In the process of migrating optimizations from the simplify-libcalls pass to the instcombine pass I noticed that a few functions are missing from the target library information. These functions need to be available for querying in the instcombine library call simplifiers. More functions will probably be added in the future as more simplifiers are migrated to instcombine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167659 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-09Add ARM TARGET2 relocation. The testcase will follow with actualy use-case.Anton Korobeynikov
Based on the patch by Logan Chien! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167633 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-09Revert r167620; this can be implemented using an existing CL option.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167622 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-09Add support for -mstrict-align compiler option for ARM targets.Chad Rosier
rdar://12340498 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167620 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-08Add @nacl.read.tp() intrinsic, a fast version of NaCl's tls_get() IRT interfaceMark Seaborn
This is in preparation for adding an LLVM pass that will expand out TLS (thread_local) variable accesses into calls to nacl.read.tp. On ARM, there is already an arm.thread.pointer intrinsic. We reuse the code for that. On x86, we have to add an implementation. The added code is based on x86's LowerToTLSExecModel() for the %gs:0 case, and on NaCl-MIPS' LowerGlobalTLSAddress() for the __nacl_read_tp() case. (In contrast, X86NaClRewritePass.cpp inserts a __nacl_read_tp() call at the lower MI level; we don't use that approach here.) We convert LowerINTRINSIC_WO_CHAIN() into a method in order to access the Subtarget member. This is consistent with other x86 Lower methods and with the ARM version. BUG=https://code.google.com/p/nativeclient/issues/detail?id=2837 TEST="llvm-lit test/NaCl" Review URL: https://codereview.chromium.org/11383002
2012-11-08Add support of RTM from TSX extensionMichael Liao
- Add RTM code generation support throught 3 X86 intrinsics: xbegin()/xend() to start/end a transaction region, and xabort() to abort a tranaction region git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167573 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07Fix up comment typo and 80-col.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167560 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07Add a relocation visitor to lib object. This works via caching relocatedEric Christopher
values in a map that can be passed to consumers. Add a testcase that ensures this works for llvm-dwarfdump. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167558 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07misched: Heuristics based on the machine model.Andrew Trick
misched is disabled by default. With -enable-misched, these heuristics balance the schedule to simultaneously avoid saturating processor resources, expose ILP, and minimize register pressure. I've been analyzing the performance of these heuristics on everything in the llvm test suite in addition to a few other benchmarks. I would like each heuristic check to be verified by a unit test, but I'm still trying to figure out the best way to do that. The heuristics are still in considerable flux, but as they are refined we should be rigorous about unit testing the improvements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167527 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07misched: handle on-the-fly regpressure queries better for 2-addrAndrew Trick
instructions without relying on liveintervals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167526 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06Add interface for object-based JIT events.Andrew Kaylor
This patch adds the interface to expose events from MCJIT when an object is emitted or freed and implements the MCJIT functionality to send those events. The IntelJITEventListener implementation is left empty for now. It will be fleshed out in a future patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167475 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06Merge commit 'cfe09ed28d8a65b671e8b7a716a933e98e810e32'Derek Schuff
Conflicts: lib/Target/ARM/ARMFrameLowering.cpp lib/Target/Mips/MipsRegisterInfo.cpp lib/Target/X86/X86ISelLowering.cpp lib/Transforms/IPO/ExtractGV.cpp tools/Makefile tools/gold/gold-plugin.cpp The only interesting conflict was X86ISelLowering.ccp, which meant I had to essentially revert r167104. The problem is that we are using ESP as the stack pointer in X86ISelLowering and RSP as the stack pointer in X86FrameLowering, and that revision made them both consistently use X86RegisterInfo to determine which to use.
2012-11-06misched: TargetSchedule interface for machine resources.Andrew Trick
Expose the processor resources defined by the machine model to the scheduler and other clients through the TargetSchedule interface. Normalize each resource count with respect to other kinds of resources. This allows scheduling heuristics to balance resources against other kinds of resources and latency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167444 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06ScheduleDAG interface. Added OrderKind to distinguish nonregister dependencies.Andrew Trick
This is in preparation for adding "weak" DAG edges, but generally simplifies the design. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167435 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05Refactor the getTypeLegalizationCost interface. No functionality change.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167422 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05Add a method to indicate section address re-assignment is finished.Andrew Kaylor
Prior to this patch RuntimeDyld attempted to re-apply relocations every time reassignSectionAddress was called (via MCJIT::mapSectionAddress). In addition to being inefficient and redundant, this led to a problem when a section was temporarily moved too far away from another section with a relative relocation referencing the section being moved. To fix this, I'm adding a new method (finalizeObject) which the client can call to indicate that it is finished rearranging section addresses so the relocations can safely be applied. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167400 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05Implement the cost of abnormal x86 instruction lowering as a table.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167395 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05Add missing this->. Fixes pr14238.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167383 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05PR14256: SelectionDAGLowering was renamed to SelectionDAGBuilder a long time ↵Eli Bendersky
ago. Fix references to it in documentation and comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167378 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-03Fix the IntegersSubsetTest unit test when compiled with gcc-4.7. The issue hereDuncan Sands
is that the unit test doesn't have IntTy equal to APInt, instead it uses a class derived from APInt. When, as in these lines, an IntTy& reference is returned but is assigned to an APInt&, the compiler destroys the temporary the IntTy& was referring to, leaving the APInt& referring to garbage. This causes the unittest to fail systematically on my machine; it can also be caught by running the test under valgrind. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167356 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-03X86 CostModel: Add support for a some of the common arithmetic instructions ↵Nadav Rotem
for SSE4, AVX and AVX2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167347 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-02CostModel: add support for Vector Insert and Extract.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167329 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-02Add a cost model analysis that allows us to estimate the cost of IR-level ↵Nadav Rotem
instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167324 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-07-13 02:46:43 +0000