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2012-12-07Add manualRetain() and manualRelease() to ImmutableMapRef, and add a new ↵Ted Kremenek
constructor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169572 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-07Add convenience accessor to Triple for OS == NaClEli Bendersky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169565 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06fixed valgrind issues of prior commit, this change applies r169456 changes ↵Pedro Artigas
back to the tree with fixes. on darwin no valgrind issues exist in the tests that used to fail. original change description: change MCContext to work on the doInitialization/doFinalization model reviewed by Evan Cheng <evan.cheng@apple.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169553 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06Revert "Allow modifying an ImmutableMap without canonicalizing it immediately."Ted Kremenek
Jordan and I discussed this, and we don't want this in the API. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169541 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06Replace r169459 with something safer. Rather than having computeMaskedBits toEvan Cheng
understand target implementation of any_extend / extload, just generate zero_extend in place of any_extend for liveouts when the target knows the zero_extend will be implicit (e.g. ARM ldrb / ldrh) or folded (e.g. x86 movz). rdar://12771555 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169536 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06Allow modifying an ImmutableMap without canonicalizing it immediately.Jordan Rose
This is an alternative to the ImmutableMapRef interface where a factory should still be canonicalizing by default, but in certain cases an improvement can be made by delaying the canonicalization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169532 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06Handle non-default array bounds.Bill Wendling
Some languages, e.g. Ada and Pascal, allow you to specify that the array bounds are different from the default (1 in these cases). If we have a lower bound that's non-default, then we emit the lower bound. We also calculate the correct upper bound in those cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169484 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06Revert r169456, "change MCContext to work on the ↵NAKAMURA Takumi
doInitialization/doFinalization model" It broke many builders. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169462 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06Let targets provide hooks that compute known zero and ones for any_extendEvan Cheng
and extload's. If they are implemented as zero-extend, or implicitly zero-extend, then this can enable more demanded bits optimizations. e.g. define void @foo(i16* %ptr, i32 %a) nounwind { entry: %tmp1 = icmp ult i32 %a, 100 br i1 %tmp1, label %bb1, label %bb2 bb1: %tmp2 = load i16* %ptr, align 2 br label %bb2 bb2: %tmp3 = phi i16 [ 0, %entry ], [ %tmp2, %bb1 ] %cmp = icmp ult i16 %tmp3, 24 br i1 %cmp, label %bb3, label %exit bb3: call void @bar() nounwind br label %exit exit: ret void } This compiles to the followings before: push {lr} mov r2, #0 cmp r1, #99 bhi LBB0_2 @ BB#1: @ %bb1 ldrh r2, [r0] LBB0_2: @ %bb2 uxth r0, r2 cmp r0, #23 bhi LBB0_4 @ BB#3: @ %bb3 bl _bar LBB0_4: @ %exit pop {lr} bx lr The uxth is not needed since ldrh implicitly zero-extend the high bits. With this change it's eliminated. rdar://12771555 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169459 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06change MCContext to work on the doInitialization/doFinalization modelPedro Artigas
reviewed by Evan Cheng <evan.cheng@apple.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169456 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05RegPressureTracker::dump(): Remove unnecessary argument.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169443 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05Change std::vector to SmallVector<4> and remove some unused methods.Eli Bendersky
This is more consistent with other vectors in this code. In addition, I ran some tests compiling a large program and >96% of fragments have 4 or less fixups, so SmallVector<4> is a good optimization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169433 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05RegisterPressureTracker: unify virtual registers and physical regunits.Andrew Trick
Now that live register units are tracked individually, the code can be simplified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169426 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05RegisterPresssureTracker: Track live physical register by unit.Andrew Trick
This is much simpler to reason about, more efficient, and fixes some corner cases involving implicit super-register defs. Fixed rdar://12797931. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169425 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05Remove unused methodsEli Bendersky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169419 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05Updates to Win64EH.h structures.Michael J. Spencer
Change member types of RuntimeFunction and UnwindInfo from uint64_t to uint32_t: These members represent addresses. According to MSDN, they are image relative, that is, they are 32-bit offsets from the starting address of the image that contains the function table entry. See MSDN for more information: RUNTIME_FUNCTION: http://msdn.microsoft.com/en-us/library/ft9x1kdx.aspx UNWIND_INFO: http://msdn.microsoft.com/en-us/library/ddssxxy8.aspx Make Win64.h platform-neutral: The standard types unit8_t, uint16_t and uint32_t are replaced with their counterparts from Endian.h. Accessor functions are introduced to replace bit fields. Patch by João Matos and Kai Nacke. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169414 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05Remove the non-const getInst accessor. It wasn't being used, and isn't veryEli Bendersky
good for enacpsulation anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169407 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05Remove two dead functions resulting from a bad rebase.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169401 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05Try to unbreak the build on hosts that don't transitively pull in a ↵Benjamin Kramer
definition for int64_t. Also use the portable (ugly) format string macros, for MSVC compatibility. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169396 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05Remove unused MachineInstr constructors.Jakob Stoklund Olesen
A MachineInstr can only ever be constructed by CreateMachineInstr() and CloneMachineInstr(), and those factories don't use the removed constructors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169395 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05Added a option to the disassembler to print immediates as hex.Kevin Enderby
This is for the lldb team so most of but not all of the values are to be printed as hex with this option. Some small values like the scale in an X86 address were requested to printed in decimal without the leading 0x. There may be some tweaks need to places that may still be in decimal that they want in hex. Specially for arm. I made my best guess. Any tweaks from here should be simple. I also did the best I know now with help from the C++ gurus creating the cleanest formatImm() utility function and containing the changes. But if someone has a better idea to make something cleaner I'm all ears and game for changing the implementation. rdar://8109283 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169393 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05- Added calls to doInitialization/doFinalization to immutable passesPedro Artigas
- fixed ordering of calls to doFinalization to be the reverse of the pass run order due to potential dependencies - fixed machine module info to operate in the doInitialization/doFinalization model, also fixes some FIXMEs reviewed by Evan Cheng <evan.cheng@apple.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169391 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05RegisterPressure API. Add support for physical register units.Andrew Trick
At build-time register pressure was always computed in terms of register units. But the compile-time API was expressed in terms of register classes because it was intended for virtual registers (and physical register units weren't yet used anywhere in codegen). Now that the codegen uses physreg units consistently, prepare for tracking register pressure also in terms of live units, not live registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169360 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05Added RegisterPressureTracker::dump() for debugging.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169359 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05Comment formatting.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169358 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05Copy clang/Driver/<Option parsing stuff> to llvm.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169344 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Remove bundling from the MCAssembler interfaceDavid Sehr
A preparatory stage towards cleanly separating bundling for upstreaming. BUG= http://code.google.com/p/nativeclient/issues/detail?id=3178 Review URL: https://codereview.chromium.org/11428170
2012-12-04Use the 'count' attribute to calculate the upper bound of an array.Bill Wendling
The count attribute is more accurate with regards to the size of an array. It also obviates the upper bound attribute in the subrange. We can also better handle an unbound array by setting the count to -1 instead of the lower bound to 1 and upper bound to 0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169312 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Remove a URL from codeEli Bendersky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169293 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Revert the LOCALMODs implementing Nacl for the legacy JITEli Bendersky
BUG= http://code.google.com/p/nativeclient/issues/detail?id=3178 Review URL: https://codereview.chromium.org/11428121
2012-12-04Make NaCl naming consistent. The triple OSType is called NaCl and is representedEli Bendersky
textually as NativeClient. Also added a link to the native client project for readers unfamiliar with it. A Clang patch will follow shortly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169291 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Fix comment typo.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169282 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04This patch introduces initial-exec model support for thread-local storageBill Schmidt
on 64-bit PowerPC ELF. The patch includes code to handle external assembly and MC output with the integrated assembler. It intentionally does not support the "old" JIT. For the initial-exec TLS model, the ABI requires the following to calculate the address of external thread-local variable x: Code sequence Relocation Symbol ld 9,x@got@tprel(2) R_PPC64_GOT_TPREL16_DS x add 9,9,x@tls R_PPC64_TLS x The register 9 is arbitrary here. The linker will replace x@got@tprel with the offset relative to the thread pointer to the generated GOT entry for symbol x. It will replace x@tls with the thread-pointer register (13). The two test cases verify correct assembly output and relocation output as just described. PowerPC-specific selection node variants are added for the two instructions above: LD_GOT_TPREL and ADD_TLS. These are inserted when an initial-exec global variable is encountered by PPCTargetLowering::LowerGlobalTLSAddress(), and later lowered to machine instructions LDgotTPREL and ADD8TLS. LDgotTPREL is a pseudo that uses the same LDrs support added for medium code model's LDtocL, with a different relocation type. The rest of the processing is straightforward. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169281 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Add a 'count' field to the DWARF subrange.Bill Wendling
The count field is necessary because there isn't a difference between the 'lo' and 'hi' attributes for a one-element array and a zero-element array. When the count is '0', we know that this is a zero-element array. When it's >=1, then it's a normal constant sized array. When it's -1, then the array is unbounded. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169218 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Add a 'getCount' method to get the number of elements in the subrange.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169215 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Add 'using' declarations to suppress -Woverloaded-virtual warnings.Matt Beaumont-Gay
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169214 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Stack Alignment: when creating stack objects in MachineFrameInfo, make sureManman Ren
the alignment is clamped to TargetFrameLowering.getStackAlignment if the target does not support stack realignment or the option "realign-stack" is off. This will cause miscompile if the address is treated as aligned and add is replaced with or in DAGCombine. Added a bool StackRealignable to TargetFrameLowering to check whether stack realignment is implemented for the target. Also added a bool RealignOption to MachineFrameInfo to check whether the option "realign-stack" is on. rdar://12713765 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169197 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Remove the old TRI::ResolveRegAllocHint() and getRawAllocationOrder() hooks.Jakob Stoklund Olesen
These functions have been replaced by TRI::getRegAllocationHints() which provides the same capabilities. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169192 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Remove VirtRegMap::getRegAllocPref().Jakob Stoklund Olesen
Now that there can be multiple hint registers from targets, it doesn't make sense to have a function that returns 'the' preferred register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169190 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Use MRI::getSimpleHint() instead of getRegAllocPref() in remaining cases.Jakob Stoklund Olesen
Targets can provide multiple hints now, so getRegAllocPref() doesn't make sense any longer because it only returns one preferred register. Replace it with getSimpleHint() in the remaining heuristics. This function only git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169188 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Stack Alignment: move functions from header file MachineFrameInfo.h.Manman Ren
No functional change for this commit. The follow-up patch will add more stuff to these functions. rdar://12713765 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169186 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03Add VirtRegMap::hasKnownPreference().Jakob Stoklund Olesen
Virtual registers with a known preferred register are prioritized by RAGreedy. This function makes the condition explicit without depending on getRegAllocPref(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169179 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03minor renaming, documentation and cleanups.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169175 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03[Support] Make FileOutputBuffer work on Windows.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169167 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03moves doInitialization and doFinalization to the Pass class and removes some ↵Pedro Artigas
unreachable code in MachineModuleInfo reviewed by Evan Cheng <evan.cheng@apple.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169164 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03Add a getMemorySize() function for DenseSet.Argyrios Kyrtzidis
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169163 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03Add a new hook for providing register allocator hints more flexibly.Jakob Stoklund Olesen
The TargetRegisterInfo::getRegAllocationHints() function is going to replace the existing mechanisms for providing target-dependent hints to the register allocator: ResolveRegAllocHint() and getRawAllocationOrder(). The new hook is more flexible because it allows the target to provide multiple preferred candidate registers for each virtual register, and it is easier to use because targets are not required to return a reference to a constant array like getRawAllocationOrder(). An optional VirtRegMap argument can be used to provide target-dependent hints that depend on the provisional assignments of other virtual registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169154 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03Eliminate redundant bitwise operations when using a llvm/ADT/PointerUnion.Argyrios Kyrtzidis
For comparison, with this code sample: PointerUnion<int *, char *> Data; PointerUnion<int *, char *> foo1() { Data = new int; return new int; } PointerUnion<int *, char *> foo2() { Data = new char; return new char; } Before this patch we would get: define i64 @_Z4foo1v() uwtable ssp { %1 = tail call noalias i8* @_Znwm(i64 4) %2 = ptrtoint i8* %1 to i64 %3 = load i64* getelementptr inbounds (%"class.llvm::PointerUnion"* @Data, i64 0, i32 0, i32 0), align 8 %4 = and i64 %3, 1 %.masked.i = and i64 %2, -3 %5 = or i64 %4, %.masked.i store i64 %5, i64* getelementptr inbounds (%"class.llvm::PointerUnion"* @Data, i64 0, i32 0, i32 0), align 8 %6 = tail call noalias i8* @_Znwm(i64 4) %7 = ptrtoint i8* %6 to i64 %8 = and i64 %7, -3 ret i64 %8 } define i64 @_Z4foo2v() uwtable ssp { %1 = tail call noalias i8* @_Znwm(i64 1) %2 = ptrtoint i8* %1 to i64 %3 = load i64* getelementptr inbounds (%"class.llvm::PointerUnion"* @Data, i64 0, i32 0, i32 0), align 8 %4 = and i64 %3, 1 %5 = or i64 %2, %4 %6 = or i64 %5, 2 store i64 %6, i64* getelementptr inbounds (%"class.llvm::PointerUnion"* @Data, i64 0, i32 0, i32 0), align 8 %7 = tail call noalias i8* @_Znwm(i64 1) %8 = ptrtoint i8* %7 to i64 %9 = or i64 %8, 2 ret i64 %9 } After the patch: define i64 @_Z4foo1v() uwtable ssp { %1 = tail call noalias i8* @_Znwm(i64 4) %2 = ptrtoint i8* %1 to i64 store i64 %2, i64* getelementptr inbounds (%"class.llvm::PointerUnion"* @Data, i64 0, i32 0, i32 0), align 8 %3 = tail call noalias i8* @_Znwm(i64 4) %4 = ptrtoint i8* %3 to i64 ret i64 %4 } declare noalias i8* @_Znwm(i64) define i64 @_Z4foo2v() uwtable ssp { %1 = tail call noalias i8* @_Znwm(i64 1) %2 = ptrtoint i8* %1 to i64 %3 = or i64 %2, 2 store i64 %3, i64* getelementptr inbounds (%"class.llvm::PointerUnion"* @Data, i64 0, i32 0, i32 0), align 8 %4 = tail call noalias i8* @_Znwm(i64 1) %5 = ptrtoint i8* %4 to i64 %6 = or i64 %5, 2 ret i64 %6 } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169147 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03Add 'getInt64Field()' method to get the signed integer instead of unsigned.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169145 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03ASan: add blacklist file to ASan pass options. Clang patch for this will follow.Alexey Samsonov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169143 91177308-0d34-0410-b5e6-96231b3b80d8
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