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2012-03-16Limit the number of memory operands in MachineInstr to 2^16 and store the ↵Benjamin Kramer
number in padding. Saves one machine word on MachineInstr (88->80 bytes on x86_64, 48->44 on i386). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152930 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-16Revert r152613 (and r152614), "Inline the d'tor and add an anchor instead." ↵NAKAMURA Takumi
for workaround of g++-4.4's miscompilation. It caused MSP430DAGToDAGISel::SelectIndexedBinOp() to be miscompiled. When two ReplaceUses()'s are expanded as inline, vtable in base class is stored to latter (ISelUpdater)ISU. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152877 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-14misched: implemented a framework for top-down or bottom-up scheduling.Andrew Trick
New flags: -misched-topdown, -misched-bottomup. They can be used with the default scheduler or with -misched=shuffle. Without either topdown/bottomup flag -misched=shuffle now alternates scheduling direction. LiveIntervals update is unimplemented with bottom-up scheduling, so only -misched-topdown currently works. Capped the ScheduleDAG hierarchy with a concrete ScheduleDAGMI class. ScheduleDAGMI is aware of the top and bottom of the unscheduled zone within the current region. Scheduling policy can be plugged into the ScheduleDAGMI driver by implementing MachineSchedStrategy. ConvergingScheduler is now the default scheduling algorithm. It exercises the new driver but still does no reordering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152700 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-13s/SjLjEHPass/SjLjEHPrepare/Bill Wendling
No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152658 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-13Inline the d'tor and add an anchor instead.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152613 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-11Convert more static tables of registers used by calling convention to ↵Craig Topper
uint16_t to reduce space. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152538 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-09misched interface: rename Begin/End to RegionBegin/RegionEnd since they are ↵Andrew Trick
not private. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152382 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-09misched: allow the default scheduler to be one chosen by the target.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152360 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-09Added TargetPassConfig::enablePassAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152359 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-08misched interface: Expose the MachineScheduler pass.Andrew Trick
Allow targets to provide their own schedulers (subclass of ScheduleDAGInstrs) to the misched pass. Select schedulers using -misched=... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152278 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07Cleanup VLIWPacketizer to use the updated ScheduleDAGInstrs interface.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152262 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07misched prep: Expose the ScheduleDAGInstrs interface so targets mayAndrew Trick
implement their own MachineScheduler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152261 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07misched preparation: rename core scheduler methods for consistency.Andrew Trick
We had half the API with one convention, half with another. Now was a good time to clean it up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152255 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07misched preparation: clarify ScheduleDAG and ScheduleDAGInstrs roles.Andrew Trick
ScheduleDAG is responsible for the DAG: SUnits and SDeps. It provides target hooks for latency computation. ScheduleDAGInstrs extends ScheduleDAG and defines the current scheduling region in terms of MachineInstr iterators. It has access to the target's scheduling itinerary data. ScheduleDAGInstrs provides the logic for building the ScheduleDAG for the sequence of MachineInstrs in the current region. Target's can implement highly custom schedulers by extending this class. ScheduleDAGPostRATDList provides the driver and diagnostics for current postRA scheduling. It maintains a current Sequence of scheduled machine instructions and logic for splicing them into the block. During scheduling, it uses the ScheduleHazardRecognizer provided by the target. Specific changes: - Removed driver code from ScheduleDAG. clearDAG is the only interface needed. - Added enterRegion/exitRegion hooks to ScheduleDAGInstrs to delimit the scope of each scheduling region and associated DAG. They should be used to setup and cleanup any region-specific state in addition to the DAG itself. This is necessary because we reuse the same ScheduleDAG object for the entire function. The target may extend these hooks to do things at regions boundaries, like bundle terminators. The hooks are called even if we decide not to schedule the region. So all instructions in a block are "covered" by these calls. - Added ScheduleDAGInstrs::begin()/end() public API. - Moved Sequence into the driver layer, which is specific to the scheduling algorithm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152208 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07misched preparation: modularize schedule emission.Andrew Trick
ScheduleDAG has nothing to do with how the instructions are scheduled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152206 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07misched preparation: modularize schedule printing.Andrew Trick
ScheduleDAG will not refer to the scheduled instruction sequence. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152205 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07misched preparation: modularize schedule verification.Andrew Trick
ScheduleDAG will not refer to the scheduled instruction sequence. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152204 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07Cleanup in preparation for misched: Move DAG visualization logic.Andrew Trick
Soon, ScheduleDAG will not refer to the BB. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152177 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07Added MachineBasicBlock::getFullName() to standardize/factor codegen ↵Andrew Trick
diagnostics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152176 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07Cleanup: DAG building is specific to either SD or MI scheduling. Not part of ↵Andrew Trick
the target interface. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152174 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07misched commentsAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152173 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-05Remove an unused function.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152028 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-04Use <def,undef> operands when spilling NEON bundles.Jakob Stoklund Olesen
MachineOperands that define part of a virtual register must have an <undef> flag if they are not intended as read-modify-write operands. The old trick of adding an <imp-def> operand doesn't work any longer. Fixes PR12177. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152008 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-04Use uint16_t to store register overlaps to reduce static data.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-02delete dead code, patch by Michael Spencer.Jia Liu
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151909 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-01Make InlineSpiller bundle-aware.Jakob Stoklund Olesen
Simply treat bundles as instructions. Spill code is inserted between bundles, never inside a bundle. Rewrite all operands in a bundle at once. Don't attempt and memory operand folding inside bundles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151787 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-01Move getBundleStart() into MachineInstrBundle.h.Jakob Stoklund Olesen
This allows the function to be inlined, and makes it suitable for use in getInstructionIndex(). Also provide a const version. C++ is great for touch typing practice. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151782 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-29Add an analyzeVirtReg() function.Jakob Stoklund Olesen
This function does more or less the same as MI::readsWritesVirtualRegister(), but it supports bundles as well. It also determines if any constraint requires reading and writing operands to use the same register. Most clients want to know. Use the more modern MO.readsReg() instead of trying to sort out undefs and partial redefines. Stop supporting the extra full <imp-def> operand as an alternative to <def,undef> sub-register defines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151690 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-29Move the operand iterator into MachineInstrBundle.h where it belongs.Jakob Stoklund Olesen
Extract a base class and provide four specific sub-classes for iterating over const/non-const bundles/instructions. This eliminates the mystery bool constructor argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151684 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28Instructions inside a bundle have the same number as the bundle itself.Jakob Stoklund Olesen
SlotIndexes are not assigned to instructions inside bundles, but it is still valid to look up the index of those instructions. The reverse getInstructionFromIndex() will return the first instruction in the bundle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151672 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-27Add a MachineOperand iterator class.Jakob Stoklund Olesen
The MIOperands iterator can visit operands on a single instruction, or all operands in a bundle. This simplifies code like the register allocator that treats bundles as a set of operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151529 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Replace a DenseSet with SmallPtrSet.Benjamin Kramer
SmallSet of pointer is the same as SmallPtrSet, use the latter directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151281 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Strip a layer of boilerplate from the VLIWPacketizer by storing the ↵Benjamin Kramer
scheduler as an opaque pointer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151252 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Track reserved registers separately from RegsAvailable.Jakob Stoklund Olesen
The bulk masking operations from register mask operands don't account for reserved registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151222 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Allow the use of an alternate symbol for calculating a function's size.Hal Finkel
The standard function epilog includes a .size directive, but ppc64 uses an alternate local symbol to tag the actual start of each function. Until recently, binutils accepted the .size directive as: .size test1, .Ltmp0-test1 however, using this directive with recent binutils will result in the error: .size expression for XXX does not evaluate to a constant so we must use the label which actually tags the start of the function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151200 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Properly emit _fltused with FastISel. Refactor to share code with SDAG.Michael J. Spencer
Patch by Joe Groff! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151183 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Initialize SUnits before DAG building.Andrew Trick
Affect on SD scheduling and postRA scheduling: Printing the DAG will display the nodes in top-down topological order. This matches the order within the MBB and makes my life much easier in general. Affect on misched: We don't need to track virtual register uses at all. This is awesome. I also intend to rely on the SUnit ID as a topo-sort index. So if A < B then we cannot have an edge B -> A. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151135 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-21Add API "handleMoveIntoBundl" for updating liveness when moving instructions ↵Lang Hames
into bundles. This method takes a bundle start and an MI being bundled, and makes the intervals for the MI's operands appear to start/end on the bundle start. Also fixes some minor cosmetic issues (whitespace, naming convention) in the HMEditor code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151099 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-21Clear virtual registers after they are no longer referenced.Andrew Trick
Passes after RegAlloc should be able to rely on MRI->getNumVirtRegs() == 0. This makes sharing code for pre/postRA passes more robust. Now, to check if a pass is running before the RA pipeline begins, use MRI->isSSA(). To check if a pass is running after the RA pipeline ends, use !MRI->getNumVirtRegs(). PEI resets virtual regs when it's done scavenging. PTX will either have to provide its own PEI pass or assign physregs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151032 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-21whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151030 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-17Transfer regmasks to MRI.Jakob Stoklund Olesen
MRI keeps track of which physregs have been used. Make sure it gets updated with all the regmask-clobbered registers. Delete the closePhysRegsUsed() function which isn't necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150830 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-17Refactor 'handleMove' code in live intervals. Clients of LiveIntervals won't seeLang Hames
any changes. Internally this adds a private inner class HMEditor, to LiveIntervals. HMEditor provides an API for updating live intervals when code is moved or bundled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150826 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15Fix library visibility problems with VLIWPacketizer.Andrew Trick
The existing framework for postra scheduling is library local. We want to keep it that way. Soon we will have a more general MachineScheduler interface. At that time, various bits will be exposed to targets. In the meantime, the VLIWPacketizer wants to use ScheduleDAGInstrs directly, so it needs to wrapped in a PIMPL to avoid exposing it to the target interface. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150633 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15Make LiveIntervals::handleMove() bundle aware.Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150630 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15Modify the code that emits the module flags to use the new module flags accessorBill Wendling
method. This allows the target lowering code to not have to deal with MDNodes. Also, avoid leaking memory like a sieve by not creating a global variable for the image info section, but just emitting the code directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150624 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15Don't expose DefaultVLIWSchedulerAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150619 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15Generic "VLIW" packetizer based on a DFA generated from target itinerary.Andrew Trick
Patch by Sundeep! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150607 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15Add a check to make sure we don't assign slot indexes for instructions ↵Lang Hames
inside bundles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150564 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15Allow CodeGen (llc) command line options to work as expected.Andrew Trick
The llc command line options for enabling/disabling passes are local to CodeGen/Passes.cpp. This patch associates those options with standard pass IDs so they work regardless of how the target configures the passes. A target has two ways of overriding standard passes: 1) Redefine the pass pipeline (override TargetPassConfig::add%Stage) 2) Replace or suppress individiual passes with TargetPassConfig::substitutePass. In both cases, the command line options associated with the pass override the target default. For example, say a target wants to disable machine instruction scheduling by default: - The target calls disablePass(MachineSchedulerID) but otherwise does not override any TargetPassConfig methods. - Without any llc options, no scheduler is run. - With -enable-misched, the standard machine scheduler is run and honors the -misched=... flag to select the scheduler variant, which may be used for performance evaluation or testing. Sorry overridePass is ugly. I haven't thought of a better way without replacing the cl::opt framework. I hope to do that one day... I haven't figured out why CodeGen uses char& for pass IDs. AnalysisID is much easier to use and less bug prone. I'm using it wherever I can for internal implementation. Maybe later we can change the global pass ID definitions as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150563 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15Added TargetPassConfig::disablePass/substitutePass as a general mechanism to ↵Andrew Trick
override specific passes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150562 91177308-0d34-0410-b5e6-96231b3b80d8
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