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2009-10-30Add a BlockAddress MachineOperand kind.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85549 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-29Move some code from being emitted as boilerplate duplicated in everyDan Gohman
*ISelDAGToDAG.cpp to being regular code in SelectionDAGISel.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85530 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-29Don't put in these EH changes.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85460 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-29Reverting r85338 for now. It's causing a bootstrap failure on PPC darwin9.Bill Wendling
--- Reverse-merging r85338 into '.': U lib/CodeGen/SimpleRegisterCoalescing.cpp U lib/CodeGen/SimpleRegisterCoalescing.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85454 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28Revert r85346 change to control tail merging by CodeGenOpt::Level.Bob Wilson
I'm going to redo this using the OptimizeForSize function attribute. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85426 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28Make AntiDepReg.h internal.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85412 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27Record CodeGen optimization level in the BranchFolding pass so that we canBob Wilson
use it to control tail merging when there is a tradeoff between performance and code size. When there is only 1 instruction in the common tail, we have been merging. That can be good for code size but is a definite loss for performance. Now we will avoid tail merging in that case when the optimization level is "Aggressive", i.e., "-O3". Radar 7338114. Since the IfConversion pass invokes BranchFolding, it too needs to know the optimization level. Note that I removed the RegisterPass instantiation for IfConversion because it required a default constructor. If someone wants to keep that for some reason, we can add a default constructor with a hard-wired optimization level. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85346 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26Allow the aggressive anti-dep breaker to process the same region multiple ↵David Goodwin
times. This is necessary because new anti-dependencies are exposed when "current" ones are broken. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85166 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26Define virtual destructor in *.cpp file.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85146 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26Add virtual destructor.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85141 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26Break anti-dependence breaking out into its own class.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85127 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26Move DataTypes.h to include/llvm/System, update all users. This breaks the lastChandler Carruth
direct inclusion edge from System to Support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85086 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22Using TrackingVH instead of WeakVH or WeakMetadataVH.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84884 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20Add getTopBlock and getBottomBlock member functions to MachineLoopInfo.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84596 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-18Spill slots cannot alias.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84432 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-18-Revert parts of 84326 and 84411. Distinquishing between fixed and non-fixedEvan Cheng
stack slots and giving them different PseudoSourceValue's did not fix the problem of post-alloc scheduling miscompiling llvm itself. - Apply Dan's conservative workaround by assuming any non fixed stack slots can alias other memory locations. This means a load from spill slot #1 cannot move above a store of spill slot #2. - Enable post-alloc scheduling for x86 at optimization leverl Default and above. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84424 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-17Distinquish stack slots from other stack objects. They (and fixed objects) ↵Evan Cheng
get FixedStack PseudoSourceValues. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84326 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-17Re-arrange some fields.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84324 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-17Revert 84315 for now. Re-thinking the patch.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84321 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-17Rename getFixedStack to getStackObject. The stack objects represented are notEvan Cheng
necessarily fixed. Only those will negative frame indices are "fixed." git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84315 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-17Add a splice member function which accepts a range instead of aDan Gohman
single iterator. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84294 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16Change createPostRAScheduler so it can be turned off at llc -O1.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84273 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14Delete bogus semicolons.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84132 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14Remove a bunch of unused arguments from functions, silencing aEric Christopher
warning. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84130 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-13Introduce new convenience methods for sign extending orDuncan Sands
truncating an SDValue (depending on whether the target type is bigger or smaller than the value's type); or zero extending or truncating it. Use it in a few places (this seems to be a popular operation, but I only modified cases of it in SelectionDAGBuild). In particular, the eh_selector lowering was doing this wrong due to a repeated rather than inverted test, fixed with this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84027 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12Enable "debug info attached to an instruction" mode.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83925 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12Delete some obsolete declarations.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83856 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-10Make getMachineNode return a MachineSDNode* instead of a generic SDNode*Dan Gohman
since it won't do any folding. This will help avoid some inconvenient casting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83698 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09The ScheduleDAG framework now requires an AliasAnalysis argument, thoughDan Gohman
it isn't needed in the ScheduleDAGSDNodes schedulers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83691 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09Factor out LiveIntervalAnalysis' code to determine whether an instructionDan Gohman
is trivially rematerializable and integrate it into TargetInstrInfo::isTriviallyReMaterializable. This way, all places that need to know whether an instruction is rematerializable will get the same answer. This enables the useful parts of the aggressive-remat option by default -- using AliasAnalysis to determine whether a memory location is invariant, and removes the questionable parts -- rematting operations with virtual register inputs that may not be live everywhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83687 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09Extract scope information from the variable itself, instead of relying on ↵Devang Patel
alloca or llvm.dbg.declare location. While recording beginning of a function, use scope info from the first location entry instead of just relying on first location entry itself. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83684 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09Add basic infrastructure and x86 support for preserving MachineMemOperandDan Gohman
information when unfolding memory references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83656 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09Indentation.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83607 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08Add a SelectionDAG getTargetInsertSubreg convenience function,Bob Wilson
similar to getTargetExtractSubreg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83564 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07second half of lazy liveness removal.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83500 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07Replace TargetInstrInfo::isInvariantLoad and its target-specificDan Gohman
implementations with a new MachineInstr::isInvariantLoad, which uses MachineMemOperands and is target-independent. This brings MachineLICM and other functionality to targets which previously lacked an isInvariantLoad implementation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83475 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07Add register-reuse to frame-index register scavenging. When a target usesJim Grosbach
a virtual register to eliminate a frame index, it can return that register and the constant stored there to PEI to track. When scavenging to allocate for those registers, PEI then tracks the last-used register and value, and if it is still available and matches the value for the next index, reuses the existing value rather and removes the re-materialization instructions. Fancier tracking and adjustment of scavenger allocations to keep more values live for longer is possible, but not yet implemented and would likely be better done via a different, less special-purpose, approach to the problem. eliminateFrameIndex() is modified so the target implementations can return the registers they wish to be tracked for reuse. ARM Thumb1 implements and utilizes the new mechanism. All other targets are simply modified to adjust for the changed eliminateFrameIndex() prototype. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83467 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07INTRINSIC_W_CHAIN and INTRINSIC_VOID do not use MemSDNode. TheyDan Gohman
may access memory, but they don't carry a MachineMemOperand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83449 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-06Add support to handle debug info attached to an instruction.Devang Patel
This is not yet enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83400 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-06Update processDebugLoc() so that it can be used to process debug info before ↵Devang Patel
and after printing an instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83363 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-05Fix a name in a comment.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83306 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-03Renamed MachineInstrIndex to LiveIndex.Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83254 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-01If location info is attached with an instruction then keep track of alloca ↵Devang Patel
slots used by a variable. This info will be used by AsmPrinter to emit debug info for variables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83189 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30Use MachineInstr as an processDebugLoc() argument.Devang Patel
This will allow processDebugLoc() to handle scopes for DWARF debug info. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83183 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30Use MDNode * directly as an RecordSourceLine() argument.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83182 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30Remove dead code.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83181 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30Add a new virtual EmitStartOfAsmFile method to the AsmPrinter and use thisBob Wilson
to emit target-specific things at the beginning of the asm output. This fixes a problem for PPC, where the text sections are not being kept together as expected. The base class doInitialization code calls DW->BeginModule() which emits a bunch of DWARF section directives. The PPC doInitialization code then emits all the TEXT section directives, with the intention that they will be kept together. But as I understand it, the Darwin assembler treats the default TEXT section as a special case and moves it to the beginning of the file, which means that all those DWARF sections are in the middle of the text. With this change, the EmitStartOfAsmFile hook is called before the DWARF section directives are emitted, so that all the PPC text section directives come out right at the beginning of the file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83176 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30Fix integer overflow in instruction scheduling. This can happen if we haveReid Kleckner
basic blocks that are so long that their size overflows a short. Also assert that overflow does not happen in the future, as requested by Evan. This fixes PR4401. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83159 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30Silence unused variable warning.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83151 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30Simplify.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83123 91177308-0d34-0410-b5e6-96231b3b80d8
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