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changes before doing phi lowering for switches.
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instructions for function arguments early and insert them after instruction selection is done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102554 91177308-0d34-0410-b5e6-96231b3b80d8
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alignment of globals to the preferred alignment, but only when
there is no section specified on the global (by far the common
case).
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ForcedAlignBits argument, tweaking the single client of it.
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produces a comment on targets that support it, but
the Dwarf writer is not hooked up yet.
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SSAUpdater. I'm going to try to refactor this to share most of the code
between them.
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itself too.
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and into SelectionDAGBuilder and FastISel.
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So far this is just a clone of -regalloc=local that has been lobotomized to run
25% faster. It drops the least-recently-used calculations, and is just plain
stupid when it runs out of registers.
The plan is to make this go even faster for -O0 by taking advantage of the short
live intervals in unoptimized code. It should not be necessary to calculate
liveness when most virtual registers are killed 2-3 instructions after they are
born.
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SelectionDAG directory and into a new Analysis.cpp file.
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extract_subreg / insert_subreg, etc.
- Add support for more aggressive insert_subreg coalescing.
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SelectionDAGBuilder, where it doesn't have to be as complicated.
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responsible for figuring out what that's supposed to be on its own.
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where multiple blocks are emitted; functions which do this need to return
the new BB so that their callers can stay current.
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an argument to things that need it.
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fetch one from the MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101807 91177308-0d34-0410-b5e6-96231b3b80d8
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than just getting one through a TargetLowering.
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indicated number of bytes.
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const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
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JIT doesn't use the MC back-end asm printer to emit labels that it uses, the
section for the MCSymbol is never set. And thus the MCSymbol for the EH label
isn't marked as "defined". Because of that, TidyLandingPads removes the needed
landing pads from the JIT output. This breaks EH for every JIT program.
This is a work-around for this limitation. We pass in the label locations
map. If the label has a non-zero value, then it was "emitted" by the JIT and
TidyLandingPads shouldn't remove that label.
A nicer solution would be to mark the MCSymbol as "used" by the JIT and not rely
upon the section being set to determine if it's defined or not.
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a bunch of stuff to support it.
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into a separate header to allow clients to use them without pulling in
SelectionDAG-specific declarations.
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MachineBasicBlock::livein_iterator a const_iterator, because
clients shouldn't ever be using the iterator interface to
mutate the livein set.
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merge XCore's section into MCSectionELF
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api and update clients to use MCContext instead.
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the compiler and asmparser now unique to the same sections. This fixes
rdar://7835021.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100807 91177308-0d34-0410-b5e6-96231b3b80d8
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e.g.
%RDI<def,dead> = MOV64rr %RAX<kill>, %EDI<imp-def>
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1. Introduce some enums and accessors in the InlineAsm class
that eliminate a ton of magic numbers when handling inline
asm SDNode.
2. Add a new MDNodeSDNode selection dag node type that holds
a MDNode (shocking!)
3. Add a new argument to ISD::INLINEASM nodes that hold !srcloc
metadata, propagating it to the instruction emitter, which
drops it.
No functionality change.
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