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2010-06-02Slightly change the meaning of the reMaterialize target hook when the originalJakob Stoklund Olesen
instruction defines subregisters. Any existing subreg indices on the original instruction are preserved or composed with the new subreg index. Also substitute multiple operands mentioning the original register by using the new MachineInstr::substituteRegister() function. This is necessary because there will soon be <imp-def> operands added to non read-modify-write partial definitions. This instruction: %reg1234:foo = FLAP %reg1234<imp-def> will reMaterialize(%reg3333, bar) like this: %reg3333:bar-foo = FLAP %reg333:bar<imp-def> Finally, replace the TargetRegisterInfo pointer argument with a reference to indicate that it cannot be NULL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105358 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-02Remove the TargetRegisterClass member from CalleeSavedInfoRafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105344 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-29SelectionDAG shouldn't have a FunctionLoweringInfo member. RegsForValueDan Gohman
shouldn't have a TargetLoweringInfo member. And FunctionLoweringInfo::set doesn't needs its EnableFastISel argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105101 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-28Add a TargetRegisterInfo::composeSubRegIndices hook with a defaultJakob Stoklund Olesen
implementation that is correct for most targets. Tablegen will override where needed. Add MachineOperand::subst{Virt,Phys}Reg methods that correctly handle existing subreg indices when sustituting registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104985 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27Add a -regalloc=default option that chooses a register allocator based on the -OJakob Stoklund Olesen
optimization level. This only really affects llc for now because both the llvm-gcc and clang front ends override the default register allocator. I intend to remove that code later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104904 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27Remove ancient prototype.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104903 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27back out 104862/104869. Can reuse stacksave after all. Very cool.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104897 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27add ISD::STACKADDR to get the current stack pointer. Will be used by sjlj EHJim Grosbach
to update the jmpbuf in the presence of VLAs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104862 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26Adjust eh.sjlj.setjmp to properly have a chain and to have an opcode entry inJim Grosbach
ISD::. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104734 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26Move the check for "calls setjmp" to SelectionDAGISel so that it can be used byBill Wendling
more than just the stack slot coloring algorithm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104722 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26Eliminate the use of PriorityQueue and just use a std::vector,Dan Gohman
implementing pop with a linear search for a "best" element. The priority queue was a neat idea, but in practice the comparison functions depend on dynamic information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104718 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26Fix indentation.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104717 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26Temporarily revert r104655 as it's breaking the bots.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104664 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26Change push_all to a non-virtual function and implement it in theDan Gohman
base class, since all the implementations are the same. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104659 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26Delete an unused function.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104658 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26Dale and Evan suggested putting the "check for setjmp" much earlier in theBill Wendling
machine code generation. That's a good idea, so I made it so. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104655 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24Avoid adding duplicate function live-in's.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104560 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-22Implement @llvm.returnaddress. rdar://8015977.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104421 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-22Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit.Jim Grosbach
Followups: docs patch for the builtin and eh.sjlj.setjmp cleanup to match longjmp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104419 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21- Change MachineInstr::findRegisterDefOperandIdx so it can also look for defsEvan Cheng
that are aliases of the specified register. - Rename modifiesRegister to definesRegister since it's looking a def of the specific register or one of its super-registers. It's not looking for def of a sub-register or alias that could change the specified register. - Added modifiesRegister to look for defs of aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21Add MachineInstr::readsWritesVirtualRegister() to determine if an instructionJakob Stoklund Olesen
reads or writes a register. This takes partial redefines and undef uses into account. Don't actually use it yet. That caused miscompiles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104372 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21constify accessor.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104325 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21Revert "Use MachineInstr::readsWritesVirtualRegister to determine if a ↵Jakob Stoklund Olesen
register is read." This reverts r104322. I think it was causing miscompilations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104323 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21Use MachineInstr::readsWritesVirtualRegister to determine if a register is read.Jakob Stoklund Olesen
This correctly handles partial redefines and undef uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104322 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21If the first definition of a virtual register is a partial redef, add anJakob Stoklund Olesen
<imp-def> operand for the full register. This ensures that the full physical register is marked live after register allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104320 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21Removed scaleNumbering method declaration from LiveInterval (not defined, ↵Lang Hames
not used). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104311 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20Allow targets more controls on what nodes are scheduled by reg pressure, ↵Evan Cheng
what for latency in hybrid mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20Add a hybrid bottom up scheduler that reduce register usage while avoidingEvan Cheng
pipeline stall. It's useful for targets like ARM cortex-a8. NEON has a lot of long latency instructions so a strict register pressure reduction scheduler does not work well. Early experiments show this speeds up some NEON loops by over 30%. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104216 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19Fix the post-RA instruction scheduler to handle instructions referenced byJim Grosbach
more than one dbg_value instruction. rdar://7759363 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104174 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19Add MachineInstr::readsVirtualRegister() in preparation for proper handling ofJakob Stoklund Olesen
partial redefines. We are going to treat a partial redefine of a virtual register as a read-modify-write: %reg1024:6 = OP Unless the register is fully clobbered: %reg1024:6 = OP, %reg1024<imp-def> MachineInstr::readsVirtualRegister() knows the difference. The first case is a read, the second isn't. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104149 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18Fix enum to address array bounds regression.mike-m
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104058 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17More data/parsing support for tls directives. Add a few more testcasesEric Christopher
and cleanup comments as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103985 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17Add some section and constant support for darwin TLS.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103974 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17Remove unused member variable.Zhongxing Xu
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103936 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-15Add reg_nodbg_iteratorJakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103856 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe whatBill Wendling
the variable actually tracks. N.B., several back-ends are using "HasCalls" as being synonymous for something that adjusts the stack. This isn't 100% correct and should be looked into. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103802 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13Adding a v8i64 512-bit vector type. This will be used to model ARM NEON ↵Evan Cheng
intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103746 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13Teach MachineLICM and MachineSink how to clear kill flags conservativelyDan Gohman
when they move instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103737 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13Add a utility function for conservatively clearing kill flags, and makeDan Gohman
use of it in MachineCSE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103726 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11Add initial kill flag support to FastISel.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103529 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11Simplify the tracking of used physregs to a bulk bitor followed by a transitiveJakob Stoklund Olesen
closure after allocating all blocks. Add a few more test cases for -regalloc=fast. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103500 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11Implement a bunch more TargetSelectionDAGInfo infrastructure.Dan Gohman
Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and EmitTargetCodeForMemmove out of TargetLowering and into SelectionDAGInfo to exercise this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103481 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-09remove a dead file.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103383 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-07Fix PR 7087, and probably other things, by extendingDale Johannesen
getConstantFP to accept the two supported long double target types. This was not the original intent, but there are other places that assume this works and it's easy enough to do. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103299 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-07switch MCSectionCOFF from a syntactic to semantic representation,Chris Lattner
patch by Peter Housel! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103267 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05Add an "IsBottomUp" member function to FastISel, which will be used toDan Gohman
support a new bottom-up mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103138 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05Move REG_SEQUENCE removal to 2addr pass.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103109 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05Teach liveintervalanalysis about virtual registers which are defined by ↵Evan Cheng
reg_sequence instructions that are formed by registers defined by distinct instructions. e.g. 80 %reg1041:6<def> = VSHRNv4i16 %reg1034<kill>, 12, pred:14, pred:%reg0 . . . 120 %reg1041:5<def> = VSHRNv4i16 %reg1039<kill>, 12, pred:14, pred:%reg0 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103102 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-04Combine the implementations of the core part of the SSAUpdater andBob Wilson
MachineSSAUpdater to avoid duplicating all the code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103060 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-03Factor out FastISel's code for materializing constants and other valuesDan Gohman
in registers into a separate function to de-couple it from the top-down-specific logic in getRegForValue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102975 91177308-0d34-0410-b5e6-96231b3b80d8
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