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2008-04-03Special handling of zero-sized live intervals.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49167 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-03- Treat a live range defined by an implicit_def as a zero-sized one.Evan Cheng
- Eliminate an implicit_def when it's being spilled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49166 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-03Start of a series of patches related to implicit_def.Evan Cheng
There is no point in creating a long live range defined by an implicit_def. Scheduler now duplicates implicit_def instruction for each of its uses. Therefore, if an implicit_def node has multiple uses, it will become a number of very short live ranges, rather than a long one. This will make coalescer's job easier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49164 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-03Backing out 48222 temporarily.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49124 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-02Now that I am told MachineRegisterInfo also tracks physical register uses / ↵Evan Cheng
defs, I can do away with the horribleness I introduced a while back. It's impossible to detect if there is any use of a physical register below an instruction (and before any def of the register) with some cheap book keeping. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49105 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-02Remove #include<map> from LiveVariables.h. Not referenced.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49099 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-02Add new CC lowering rule: provide a list of registers, which can be 'shadowed',Anton Korobeynikov
when some another register is used for argument passing. Currently is used on Win64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49079 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-02Recommitting EH patch; this should answer most of theDale Johannesen
review feedback. -enable-eh is still accepted but doesn't do anything. EH intrinsics use Dwarf EH if the target supports that, and are handled by LowerInvoke otherwise. The separation of the EH table and frame move data is, I think, logically figured out, but either one still causes full EH info to be generated (not sure how to split the metadata correctly). MachineModuleInfo::needsFrameInfo is no longer used and is removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49064 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-01update comment.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49010 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-29Cosmetic change.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48935 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-28Rename getAnyLoad to getLoad is suggested by Evan.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48914 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-27Implement LegalizeTypes support for softfloat LOAD.Duncan Sands
In order to handle indexed nodes I had to introduce a new constructor, and since I was there I factorized the code in the various load constructors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48894 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-27Avoid creating chain dependencies from CopyToReg nodes to load and storeDan Gohman
nodes. This doesn't currently have much impact the generated code, but it does produce simpler-looking SelectionDAGs, and consequently simpler-looking ScheduleDAGs, because there are fewer spurious dependencies. In particular, CopyValueToVirtualRegister now uses the entry node as the input chain dependency for new CopyToReg nodes instead of calling getRoot and depending on the most recent memory reference. Also, rename UnorderedChains to PendingExports and pull it up from being a local variable in SelectionDAGISel::BuildSelectionDAG to being a member variable of SelectionDAGISel, so that it doesn't have to be passed around to all the places that need it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48893 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-26Use a linked data structure for the uses lists of an SDNode, just like Roman Levenstein
LLVM Value/Use does and MachineRegisterInfo/MachineOperand does. This allows constant time for all uses list maintenance operations. The idea was suggested by Chris. Reviewed by Evan and Dan. Patch is tested and approved by Dan. On normal use-cases compilation speed is not affected. On very big basic blocks there are compilation speedups in the range of 15-20% or even better. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48822 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-25A quick nm audit turned up several fixed tables and objects that wereDan Gohman
marked read-write. Use const so that they can be allocated in a read-only segment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48800 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-22Teach DAG combiner to commute commutable binary nodes in order to achieve ↵Evan Cheng
sdisel CSE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48673 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-21Don't include <map> in Pass.h, which doesn't need it. This requiresDan Gohman
adding <map> to many files that actually do need it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48667 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-21Introduce a new node for holding call argumentDuncan Sands
flags. This is needed by the new legalize types infrastructure which wants to expand the 64 bit constants previously used to hold the flags on 32 bit machines. There are two functional changes: (1) in LowerArguments, if a parameter has the zext attribute set then that is marked in the flags; before it was being ignored; (2) PPC had some bogus code for handling two word arguments when using the ELF 32 ABI, which was hard to convert because of the bogusness. As suggested by the original author (Nicolas Geoffray), I've disabled it for the moment. Tested with "make check" and the Ada ACATS testsuite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48640 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-19Fix live variables issues:Evan Cheng
1. If part of a register is re-defined, an implicit kill and an implicit def are added to denote read / mod / write. However, this should only be necessary if the register is actually read later. This is a performance issue. 2. If a sub-register is being defined, and it doesn't have a previous use, do not add a implicit kill to the last use of a super-register: = EAX, AX<imp-use,kill> ... AX = In this case, EAX is live but AX is killed, this is wrong and will cause the coalescer to do bad things. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48521 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-15Replace all target specific implicit def instructions with a target ↵Evan Cheng
independent one: TargetInstrInfo::IMPLICIT_DEF. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14Back out r48353. Not needed.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48375 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14Add an MO_Undef MachineOperandType, intended for INSERT_SUBREG. Next up ↵Evan Cheng
MO_Undead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48353 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14Forgot this.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48349 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13Fix a typo in a comment.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48345 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13Improve VarInfo::removeKill() by using std::find instead of linear search.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48321 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13Refactor some code out of MachineSink into a MachineInstr query.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48311 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12Experimental scheduler change to schedule / coalesce the copies added for ↵Evan Cheng
function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted: entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0: Live Ins: %EAX %EDX %ECX %reg1031<def> = MOVPC32r 0 %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def> %reg1028<def> = MOV32rr %EAX %reg1029<def> = MOV32rr %EDX %reg1030<def> = MOV32rr %ECX %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0] %reg1025<def> = MOV32rr %reg1029 %reg1026<def> = MOV32rr %reg1030 %reg1024<def> = MOV32rr %reg1028 The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled. With -schedule-livein-copies: entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0: Live Ins: %EAX %EDX %ECX %reg1031<def> = MOVPC32r 0 %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def> %reg1024<def> = MOV32rr %EAX %reg1025<def> = MOV32rr %EDX %reg1026<def> = MOV32rr %ECX %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0] Much better! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48307 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12Don't try to extract an i32 from an f64. ThisDuncan Sands
getCopyToParts problem was noticed by the new LegalizeTypes infrastructure. In order to avoid this kind of thing in the future I've added a check that EXTRACT_ELEMENT is only used with integers. Once LegalizeTypes is up and running most likely BUILD_PAIR and EXTRACT_ELEMENT can be removed, in favour of using apints instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48294 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12Document an implementation detail about EXTRACT_SUBREG and INSERT_SUBREG ↵Evan Cheng
sub-register operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48283 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11Use PassManagerBase instead of FunctionPassManager for functionsDan Gohman
that merely add passes. This allows them to be used with either FunctionPassManager or PassManager, or even with a custom new kind of pass manager. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48256 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11When the register allocator runs out of registers, spill a physical register ↵Evan Cheng
around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48218 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Implement more support for fp-to-i128 and i128-to-fp conversions. Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48189 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48167 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Use uint64_t not unsigned long long.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48154 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Allow insert_subreg into implicit, target-specific values. Christopher Lamb
Change insert/extract subreg instructions to be able to be used in TableGen patterns. Use the above features to reimplement an x86-64 pseudo instruction as a pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48130 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Increase ISD::ParamFlags to 64 bits. Increase the ByValSizeDale Johannesen
field to 32 bits, thus enabling correct handling of ByVal structs bigger than 0x1ffff. Abstract interface a bit. Fixes gcc.c-torture/execute/pr23135.c and gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing on ppc32, quietly producing wrong code on x86-32.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48122 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} ↵Evan Cheng
and prefetchnta instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-06When setting the "unused" info, take into account something like this:Bill Wendling
%r3<def> = OR %x3<kill>, %x3 We don't want to mark the %r3 as unused even though it's a sub-register of %x3. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48003 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05Clarify that CALLSEQ_START..END may not be nested,Dale Johannesen
and add some protection against creating such. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47957 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05Codegen support for i128 SINT_TO_FP.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47928 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05Refactor code. Remove duplicated functions that basically do the same thing asEvan Cheng
findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47927 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-04Rename isOperand() to isOperandOf() (and other similar methods). It always ↵Evan Cheng
confuses me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47872 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-03This is the initial check-in for adding register scavenging to PPC. (Currently,Bill Wendling
PPC-64 doesn't work.) This also lowers the spilling of the CR registers so that it uses a register other than the default R0 register (the scavenger scrounges for one). A significant part of this patch fixes how kill information is handled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47863 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-01Add MVT::is128BitVector and is64BitVector. ShrinkDale Johannesen
unaligned load/store code using them. Per review of unaligned load/store vector patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47782 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-29Don't fill eh frames even though these are text sections.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47765 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-28Document that the shuffle mask may contain undefDuncan Sands
values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47719 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-28Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to ↵Evan Cheng
16-byte boundaries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47703 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27Fix a bug in dead spill slot elimination.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47687 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27LegalizeTypes support for INSERT_VECTOR_ELT.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47669 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27Don't track max alignment during stack object allocations since they can be ↵Evan Cheng
deleted later. Let PEI compute it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47668 91177308-0d34-0410-b5e6-96231b3b80d8
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