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2011-10-05Add accessor method to check if the landing pad symbol has call site ↵Bill Wendling
information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141244 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Add an ivar that maps a landing pad's EH symbol to the call sites that may jumpBill Wendling
to the landing pad. This will be used by the back-end to generate the jump tables for dispatching the arriving longjmp in sjlj eh. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141224 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Allow <undef> flags on def operands as well as uses.Jakob Stoklund Olesen
The <undef> flag says that a MachineOperand doesn't read its register, or doesn't depend on the previous value of its register. A full register def never depends on the previous register value. A partial register def may depend on the previous value if it is intended to update part of a register. For example: %vreg10:dsub_0<def,undef> = COPY %vreg1 %vreg10:dsub_1<def> = COPY %vreg2 The first copy instruction defines the full %vreg10 register with the bits not covered by dsub_0 defined as <undef>. It is not considered a read of %vreg10. The second copy modifies part of %vreg10 while preserving the rest. It has an implicit read of %vreg10. This patch adds a MachineOperand::readsReg() method to determine if an operand reads its register. Previously, this was modelled by adding a full-register <imp-def> operand to the instruction. This approach makes it possible to determine directly from a MachineOperand if it reads its register. No scanning of MI operands is required. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141124 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Doxygen-ize comments. No functionality change.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141122 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Add method to determine if a begin label has a call site number associated ↵Bill Wendling
with it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141107 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30Move getCommonSubClass() into TRI.Jakob Stoklund Olesen
It will soon need the context. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140896 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29Fix typo.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140807 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29Remove NumImplicitOps which is now unused.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140767 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-28Create and use an llvm.eh.sjlj.functioncontext intrinsic.Bill Wendling
This intrinsic is used to pass the index of the function context to the back-end for further processing. The back-end is in charge of filling in the rest of the entries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140676 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27Remove X86-dependent stuff from SSEDomainFix.Jakob Stoklund Olesen
This also enables domain swizzling for AVX code which required a few trivial test changes. The pass will be moved to lib/CodeGen shortly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140659 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27Rename AddSelectionDAGCSEId() to addSelectionDAGCSEId().Jim Grosbach
Naming conventions consistency. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140636 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27Cleanup PromoteIntOp_EXTRACT_VECTOR_ELT and PromoteIntRes_SETCC.Nadav Rotem
Add a new method: getAnyExtOrTrunc and use it to replace the manual check. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140603 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-25Clean up code after renaming LowerSubregs -> ExpandPostRAPseudos.Jakob Stoklund Olesen
No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140470 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22Add a MinNumRegs argument to MRI::constrainRegClass().Jakob Stoklund Olesen
The function will refuse to use a register class with fewer registers than MinNumRegs. This can be used by clients to avoid accidentally increase register pressure too much. The default value of MinNumRegs=0 doesn't affect how constrainRegClass() works. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140339 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15Use getPrevSlot() instead of getPrevIndex().Jakob Stoklund Olesen
The getPrevIndex() function moves to the same slot in the previous instruction. For getVNInfoBefore(), we just need the previous slot in the same instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139793 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15Stop verifying hasPHIKill() flags.Jakob Stoklund Olesen
There is only one legitimate use remaining, in addIntervalsForSpills(). All other calls to hasPHIKill() are only used to update PHIKill flags. The addIntervalsForSpills() function is part of the old spilling framework, only used by linearscan. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139783 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15Leave hasPHIKill flags alone in LiveInterval::RenumberValues.Jakob Stoklund Olesen
It is conservatively correct to keep the hasPHIKill flags, even after deleting PHI-defs. The calculation can be very expensive after taildup has created a quadratic number of indirectbr edges in the CFG, and the hasPHIKill flag isn't used for anything after RenumberValues(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139780 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15[regcoalescing] bug fix for RegistersDefinedFromSameValue.Andrew Trick
An improper SlotIndex->VNInfo lookup was leading to unsafe copy removal. Fixes PR10920 401.bzip2 miscompile with no IV rewrite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139765 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-13Fix indenting.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139670 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-13Switch extendInBlock() to take a kill slot instead of the last use slot.Jakob Stoklund Olesen
Three out of four clients prefer this interface which is consistent with extendIntervalEndTo() and LiveRangeCalc::extend(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139604 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-08Directly point debug info to the stack slot of the arugment, instead of ↵Devang Patel
trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139330 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-07Relax the MemOperands on atomics a bit. Fixes -verify-machineinstrs ↵Eli Friedman
failures for atomic laod/store on ARM. (The fix for the related failures on x86 is going to be nastier because we actually need Acquire memoperands attached to the atomic load instrs, etc.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139221 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-06Add codegen support for vector select (in the IR this means a selectDuncan Sands
with a vector condition); such selects become VSELECT codegen nodes. This patch also removes VSETCC codegen nodes, unifying them with SETCC nodes (codegen was actually often using SETCC for vector SETCC already). This ensures that various DAG combiner optimizations kick in for vector comparisons. Passes dragonegg bootstrap with no testsuite regressions (nightly testsuite as well as "make check-all"). Patch mostly by Nadav Rotem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139159 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-06Split the init.trampoline intrinsic, which currently combines GCC'sDuncan Sands
init.trampoline and adjust.trampoline intrinsics, into two intrinsics like in GCC. While having one combined intrinsic is tempting, it is not natural because typically the trampoline initialization needs to be done in one function, and the result of adjust trampoline is needed in a different (nested) function. To get around this llvm-gcc hacks the nested function lowering code to insert an additional parent variable holding the adjust.trampoline result that can be accessed from the child function. Dragonegg doesn't have the luxury of tweaking GCC code, so it stored the result of adjust.trampoline in the memory GCC set aside for the trampoline itself (this is always available in the child function), and set up some new memory (using an alloca) to hold the trampoline. Unfortunately this breaks Go which allocates trampoline memory on the heap and wants to use it even after the parent has exited (!). Rather than doing even more hacks to get Go working, it seemed best to just use two intrinsics like in GCC. Patch mostly by Sanjoy Das. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139140 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Basic x86 code generation for atomic load and store instructions.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138478 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18FastISel: avoid function calls between the materialization of the constant ↵Ivan Krasin
and its use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137993 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17Add the support in code-gen for the landingpad instruction lowering.Bill Wendling
The landingpad instruction is lowered into the EXCEPTIONADDR and EHSELECTION SDNodes. The information from the landingpad instruction is harvested by the 'AddLandingPadInfo' function. The new EH uses the current EH scheme in the back-end. This will change once we switch over to the new scheme. (Reviewed by Jakob!) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137880 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12Constify.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137489 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12Use ArrayRef.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137485 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12Silence a bunch (but not all) "variable written but not read" warningsDuncan Sands
when building with assertions disabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137460 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12A virtual destructor for the class with virtual methods!Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137400 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Stay within 80 columns.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137283 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10Provide utility to extract and use lexical scoping information from machine ↵Devang Patel
instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137237 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Trim an unneeded header.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137184 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Move CalculateRegClass to MRI::recomputeRegClass.Jakob Stoklund Olesen
This function doesn't have anything to do with spill weights, and MRI already has functions for manipulating the register class of a virtual register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137123 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Refer to the RegisterCoalescer pass by ID.Jakob Stoklund Olesen
A public interface is no longer needed since RegisterCoalescer is not an analysis any more. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137082 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-03Add more constantness in BlockFrequencyInfo.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136816 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-30Revert r136253, r136263, r136269, r136313, r136325, r136326, r136329, r136338,Bill Wendling
r136339, r136341, r136369, r136387, r136392, r136396, r136429, r136430, r136444, r136445, r136446, r136253 pending review. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136556 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29Add an isSSA() flag to MachineRegisterInfo.Jakob Stoklund Olesen
This flag is true from isel to register allocation when the machine function is required to be in SSA form. The TwoAddressInstructionPass and PHIElimination passes clear the flag. The SSA flag wil be used by the machine code verifier to check for SSA form, and eventually an assertion can enforce it in +Asserts builds. This will catch the common target error of creating machine code with multiple defs of a virtual register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136532 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29Misc optimizer+codegen work for 'cmpxchg' and 'atomicrmw'. They appear to beEli Friedman
working on x86 (at least for trivial testcases); other architectures will need more work so that they actually emit the appropriate instructions for orderings stricter than 'monotonic'. (As far as I can tell, the ARM, PPC, Mips, and Alpha backends need such changes.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136457 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Add the AddLandingPadInfo function.Bill Wendling
AddLandingPadInfo takes a landingpad instruction and grabs all of the information from it that it needs for EH table generation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136429 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Use ArrayRef instead of requiring an std::vector.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136396 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27Code generation for 'fence' instruction.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136283 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27Use BlockFrequency instead of uint32_t in BlockFrequencyInfo.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136278 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Fix #include guard directive.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135947 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Rename BlockFrequency to BlockFrequencyInfo and MachineBlockFrequency toJakub Staszak
MachineBlockFrequencyInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135937 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22Add a method to set the compact unwind info.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135806 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22Allow getBlockFreq to return 0.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135742 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20Goodbye TargetAsmInfo. This eliminate last bit of CodeGen and Target in llvm-mc.Evan Cheng
There is still a bit more refactoring left to do in Targets. But we are now very close to fixing all the layering issues in MC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135611 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20Add MCObjectFileInfo and sink the MCSections initialization code fromEvan Cheng
TargetLoweringObjectFileImpl down to MCObjectFileInfo. TargetAsmInfo is done to one last method. It's *almost* gone! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135569 91177308-0d34-0410-b5e6-96231b3b80d8
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