Age | Commit message (Collapse) | Author |
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BUG=None
R=mseaborn@chromium.org
Review URL: https://codereview.chromium.org/21011005
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BUG=None
R=mseaborn@chromium.org
Review URL: https://codereview.chromium.org/20862002
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The PNaCl bitcode writer doesn't generate certain forms of instructions that
the PNaCl bitcode writer accepts. Since these instructions do not get
generated, remove them from the bitcode reader.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=3590
R=jvoung@chromium.org
Review URL: https://codereview.chromium.org/20442002
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Removes block address constants because they are not part of the PNaClABI.
Suggested in CL https://codereview.chromium.org/20172002
BUG= https://code.google.com/p/nativeclient/issues/detail?id=3590
R=mseaborn@chromium.org
Review URL: https://codereview.chromium.org/20402002
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VAArg
Invoke
GetElementPtr
LandingPad
Resume
IndirectBr
ExtractElement
InsertElement
ShuffleVector
ExtractValue
InsertValue
AtomicCmpXchg
AtomicRMW
BUG= https://code.google.com/p/nativeclient/issues/detail?id=3590
R=mseaborn@chromium.org
Review URL: https://codereview.chromium.org/20124002
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reader/writer, since they can't appear in PNaCl bitcode.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=3590
R=mseaborn@chromium.org
Review URL: https://codereview.chromium.org/20172002
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BUG= https://code.google.com/p/nativeclient/issues/detail?id=3588
R=jvoung@chromium.org
Review URL: https://codereview.chromium.org/19606003
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Focus on nacl_file and its interface with pnacl-llc.cpp; nacl_file as a name no longer makes sense, and neither do the comments describing it - so rename it. Also cleanup the interface a bit, and use more LLVM-y stuff instead of new data types.
BUG=None
R=dschuff@chromium.org, jfb@chromium.org
Review URL: https://codereview.chromium.org/20186002
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Prevent sandbox addresses from being written to the stack. This
covers the following cases:
1. Function calls manually push a masked return address and jump to
the target, rather than using the call instruction.
2. When the function prolog chooses to use a frame pointer (rbp), it
saves a masked version of the old rbp.
3. Indirect branches (jumps, calls, and returns) uniformly use r11 to
construct the 64-bit target address.
4. Register r11 is marked as reserved (similar to r15) so that the
register allocator won't inadvertently spill a code address to the
stack.
These transformations can be disabled for performance testing with the
flag "-sfi-hide-sandbox-base=false".
BUG= https://code.google.com/p/nativeclient/issues/detail?id=1235
R=eliben@chromium.org, mseaborn@chromium.org
Review URL: https://codereview.chromium.org/19505003
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Several parts of the already in-place code have been omitted in the previous
merge. These are:
- missing lowering of Intrinsic::nacl_read_tp;
- checks for forbidden instructiosn in branch-delay slots;
- lowering operation for ISD::NACL_TP_TLS_OFFSET and ISD::NACL_TP_TDB_OFFSET.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=2275
TEST= run smoke tests
R=eliben@chromium.org
Review URL: https://codereview.chromium.org/19614006
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Simplifying code, style, removing unnecessary code & includes, etc.
BUG=None
R=jfb@chromium.org
Review URL: https://codereview.chromium.org/19808004
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BUG= test the fix that was already cherrypicked
TEST= self
R=eliben@chromium.org
Review URL: https://codereview.chromium.org/19704008
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Post 3.3-merge there seems to be a problem using mmap on cygwin. In the
meantime, as a LOCALMOD, we disable usage of mmap in MemoryBuffer. The
effect of this on the Windows/Cygwin toolchain can be a slightly slower
developer-side linkage time.
BUG=https://code.google.com/p/nativeclient/issues/detail?id=3578
R=dschuff@chromium.org
Review URL: https://codereview.chromium.org/19923003
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Specifically:
r186489 - Fix ARMFastISel::ARMEmitIntExt shift emission
r183794 - ARM FastISel fix sext/zext fold
r183601 - Fix unused variable warning from my previous patch
r183551 - ARM FastISel integer sext/zext improvements
These should fix some failures that I had run into back then, as well as make ARM FastISel faster because it doesn't go to SelectionDAG.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=3501
R=jvoung@chromium.org
TEST= make check-all
Review URL: https://codereview.chromium.org/19992002
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Modifies PNaCl bitcode reader/writer to accept PNaClVersion=1 as supported,
and all other versions are unsupported and unreadable. The PNaCl bitcode
reader/writer will generate appropriate messages (including what version
is unsupported if applicable).
Also allows command-line option --pnacl-version for setting the PNaClVersion
in the PNaCl bitcode writer.
Also fixes some problems on PNaCl bitcode headers, using common support to
determine when the read/written PNaCl bitcode file is valid.
BUG=None
R=jvoung@chromium.org
Review URL: https://codereview.chromium.org/19400002
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Fix printing of instructions/constants to explicitly check on cast opcodes
and binary operators, so that we don't accidentally allow unknown opcodes.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=3570
R=jvoung@chromium.org
Review URL: https://codereview.chromium.org/19242003
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Remove dead code for:
(1) Top-level inline assembly.
(2) Remove code for named sections.
(3) Remove code for GC names.
(4) Global variable aliases.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=3405
R=jvoung@chromium.org
Review URL: https://codereview.chromium.org/18770005
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BUG=https://code.google.com/p/nativeclient/issues/detail?id=3525
R=jfb@chromium.org
Review URL: https://codereview.chromium.org/19668004
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Following our discussion in the related bug, prefetch will not be part of our initial stable ABI.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=3531
TEST= cd ./pnacl/build/llvm_x86_64; ninja check
R=jvoung@chromium.org
Review URL: https://codereview.chromium.org/19771015
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BUG=https://code.google.com/p/nativeclient/issues/detail?id=3349
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/19500012
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BUG=None
R=dschuff@chromium.org
Review URL: https://codereview.chromium.org/19472003
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Suggested in review: https://codereview.chromium.org/19705002/
BUG=None
R=jvoung@chromium.org
Review URL: https://codereview.chromium.org/19774012
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sandboxed build. Condition them properly on __native_client__.
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first
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The issues these tests exercise came up in the recent merge of LLVM 3.3;
Since it's considerably more difficult to debug problems in scons tests or
sbtc tests, it makes sense to increase the coverate of LLVM regression tests
as much as possible. These tests help resolve merging issues relatively quickly
and should provide a first-line defense against problem arising in the NaCl
specific LOCALMODs we have within LLVM.
BUG=https://code.google.com/p/nativeclient/issues/detail?id=3578
R=jfb@chromium.org
Review URL: https://codereview.chromium.org/19705002
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on ARM fail
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This applies only to %r15 sandboxed memory references. The problem
is that if the index register is negative, the sandboxing operation
will cause the index to become a large positive 32-bit value, which
combined with the displacement, will overflow and try to reference
memory outside the sandbox. This situation may legitimately occur
if the compiler happens to construct a (constant) interior pointer
to the middle of the global struct/array, and then dereferences it
with a variable offset.
After this fix, pnacl/scripts/testsuite_known_failures_pnacl.txt can
be updated to remove the "aha x86-64" known failure.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=3517
R=eliben@chromium.org
Review URL: https://codereview.chromium.org/17987002
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BUG=None
R=mseaborn@chromium.org
Review URL: https://codereview.chromium.org/19284013
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Conflicts:
docs/LangRef.rst
include/llvm/CodeGen/CallingConvLower.h
include/llvm/IRReader/IRReader.h
include/llvm/Target/TargetMachine.h
lib/CodeGen/CallingConvLower.cpp
lib/IRReader/IRReader.cpp
lib/IRReader/LLVMBuild.txt
lib/IRReader/Makefile
lib/LLVMBuild.txt
lib/Makefile
lib/Support/MemoryBuffer.cpp
lib/Support/Unix/PathV2.inc
lib/Target/ARM/ARMBaseInstrInfo.cpp
lib/Target/ARM/ARMISelLowering.cpp
lib/Target/ARM/ARMInstrInfo.td
lib/Target/ARM/ARMSubtarget.cpp
lib/Target/ARM/ARMTargetMachine.cpp
lib/Target/Mips/CMakeLists.txt
lib/Target/Mips/MipsDelaySlotFiller.cpp
lib/Target/Mips/MipsISelLowering.cpp
lib/Target/Mips/MipsInstrInfo.td
lib/Target/Mips/MipsSubtarget.cpp
lib/Target/Mips/MipsSubtarget.h
lib/Target/X86/X86FastISel.cpp
lib/Target/X86/X86ISelDAGToDAG.cpp
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86InstrControl.td
lib/Target/X86/X86InstrFormats.td
lib/Transforms/IPO/ExtractGV.cpp
lib/Transforms/InstCombine/InstCombineCompares.cpp
lib/Transforms/Utils/SimplifyLibCalls.cpp
test/CodeGen/X86/fast-isel-divrem.ll
test/MC/ARM/data-in-code.ll
tools/Makefile
tools/llvm-extract/llvm-extract.cpp
tools/llvm-link/CMakeLists.txt
tools/opt/CMakeLists.txt
tools/opt/LLVMBuild.txt
tools/opt/Makefile
tools/opt/opt.cpp
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No functionality change.
BUG=None
R=jvoung@chromium.org
Review URL: https://codereview.chromium.org/19235002
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By default, using the path inherited from llc, the verifier is run twice.
We only need it to run once right after reading the bitcode in and before
the ABI verifier runs.
BUG=https://code.google.com/p/nativeclient/issues/detail?id=3553
R=jvoung@chromium.org
Review URL: https://codereview.chromium.org/18920004
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Add portable support for concurrency in PNaCl's ABI:
- Promote volatile to atomic.
- Promote all memory ordering to sequential consistency.
- Rewrite all atomic operations to frozen NaCl intrinsics for pexe.
- Rewrite atomic intrinsics to LLVM instructions for translation.
This change also adds documentation to the PNaCl language reference, as
well as tests where it makes sense.
A future CL could clean up more of our code which mentions atomics,
volatiles, memory orderings.
Multiple reviewers because this is a big patch:
- eliben: LLVM-fu and ResolvePNaClIntrinsics.
- dschuff: ABI stability.
- mseaborn: ABI stability.
- sehr: Tron-duty (fight for the user's programs to work).
BUG= https://code.google.com/p/nativeclient/issues/detail?id=3475
R=dschuff@chromium.org, eliben@chromium.org, sehr@google.com
TEST= (cd ./pnacl/build/llvm_x86_64; ninja check-all) && ./pnacl/test.sh test-x86-32 && ./pnacl/test.sh test-x86-64 && ./pnacl/test.sh test-arm && ./pnacl/test.sh test-x86-32-sbtc && ./pnacl/test.sh test-x86-64-sbtc && ./pnacl/test.sh test-arm-sbtc
Review URL: https://codereview.chromium.org/17777004
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ARM paired GPR COPY was being lowered to two MOVr without CC. This patch puts the CC back.
I sent this patch upstream (with a test) but haven't received a review yet. This seems like a simple oversight in the code, and is holding my atomics patch so I'd like to get it into our repo.
R=dschuff@chromium.org
TEST= ./scons run_llvm_bitmanip_intrinsics_test platform=arm
BUG= no CC on MOVr
Review URL: https://codereview.chromium.org/18047006
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PNaCl's LLVM sandboxing wasn't correct for ARM load/store exclusive dual. I encountered this while running our testsuite with my atomic changes: the tests which use volatile 64-bit values started failing validation.
R=dschuff@chromium.org
BUG= validation failure
TEST= ./pnacl/test.sh test-arm
Review URL: https://codereview.chromium.org/18978015
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The instruction that was generated for paired register stack slot load was wrong. This was fixed by Tim Northover in LLVM 3.3 commit 179977, but his patch does much more and doesn't apply as-is to our tree. I'll therefore punt applying the full patch to when we rebase to 3.3.
I encountered the issue while working on atomics (64-bit atomics require paired registers on ARM), and saw the 3.3 fix when I tried upstreaming my fix.
BUG= non
TEST= ./pnacl/test.sh test-arm
R=eliben@chromium.org
Review URL: https://codereview.chromium.org/18699004
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BUG=https://code.google.com/p/nativeclient/issues/detail?id=3524
R=jfb@chromium.org
Review URL: https://codereview.chromium.org/18614013
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This allows running the utility on finalized/frozen pexes.
R=kschimpf@google.com
BUG=none
Review URL: https://codereview.chromium.org/18884003
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GlobalOpt currently assumes only an external "main" is the "real main".
This is no longer the case for PNaCl, where we internalize "main". Make
the test more strict and PNaCl specific by checking that "main" is just
used once - in a call from "_start", but does not have to be external.
Note that this also addresses a possible bug in the optimization for C
code, since C does not guarantee that main is not recursive.
This CL's purpose is to address a SPEC performance regression - 10% in
183.equake. The regression appeared after our ABI change that made 'main'
internal, which disabled this particular optimization. The CL addresses
this by re-enabling the optimization and also being more C-standard
conforming.
BUG=None
Review URL: https://codereview.chromium.org/18615015
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Disable an assertion. This assertion made the behaviour on x86-32
inconsistent with x86-64 and ARM.
BUG=https://code.google.com/p/nativeclient/issues/detail?id=3548
TEST=*.ll tests + PNaCl toolchain trybots
Review URL: https://codereview.chromium.org/18261008
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translator.
Saves about 100KB per arch. As noted in the test, some
of the functions like getRegisterName() are not pruned.
Common infrastructure code may still be sitting around,
only the ${ARCH}InstPrinter::* is touched... but this
is just a one-liner.
BUG=https://code.google.com/p/nativeclient/issues/detail?id=1222
TEST=https://codereview.chromium.org/18333008/
R=dschuff@chromium.org
Review URL: https://codereview.chromium.org/18238011
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vectorizing loops with memory accesses to non-zero address spaces. It
simply dropped the AS info. Fixes PR16306.
Merged from r184103
Author: Pekka Jaaskelainen <pekka.jaaskelainen@tut.fi>
Date: Mon Jun 17 18:49:06 2013 +0000
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@185869 91177308-0d34-0410-b5e6-96231b3b80d8
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