aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2012-12-20This assert is overly restrictive and does not work for mips16.Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170667 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Turn on register scavenger for Mips 16Reed Kotler
We use an unused Mips 32 register for the emergency slot instead of using the stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170665 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20[mips] Refactor SLT (set on less than) instructions. Separate encodingAkira Hatanaka
information from the rest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170664 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20[mips] Refactor unconditional branch instruction. Separate encoding informationAkira Hatanaka
from the rest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170663 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20[mips] Remove asm string parameter from pseudo instructions. Add InstrItinClass Akira Hatanaka
parameter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170661 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20[mips] Delete definition of CPRESTORE instruction.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170660 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20[mips] Refactor conditional branch instructions with one register operand.Akira Hatanaka
Separate encoding information from the rest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170659 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Don't use isa<CallInst>(this) in the constructor for CallInst's base class.Richard Smith
This has undefined behavior, because the classof implementation attempts to access parts of the not-yet-constructed derived class. Found by clang -fsanitize=vptr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170658 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20[mips] Refactor conditional branch instructions with two register operands.Akira Hatanaka
Separate encoding information from the rest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170657 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20fix most of remaining issues with large frames.Reed Kotler
these patches are tested a lot by test-suite but make check tests are forthcoming once the next few patches that complete this are committed. with the next few patches the pass rate for mips16 is near 100% git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170656 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20[mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copyAkira Hatanaka
physical register $r1 to $r0. GNU disassembler recognizes an "or" instruction as a "move", and this change makes the disassembled code easier to read. Original patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170655 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Fix use-before-construction of X86TargetLowering.Richard Smith
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170654 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Don't use -1 as a value of an unsigned 7-bit enumeration; that has undefinedRichard Smith
behavior and violates the !range constraints we put on loads of this enum. Found by clang -fsanitize=enum. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170653 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Don't leave IsUnsigned uninitialized in a default-constructed APSInt. CopyingRichard Smith
such a structure has undefined behavior. Caught by -fsanitize=bool. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170652 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20[mips] Change the order of template parameters. Move the default parameters toAkira Hatanaka
the end. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170651 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20[mips] Refactor shift instructions with register operands. Separate encodingAkira Hatanaka
information from the rest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170650 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20[mips] Refactor shift immediate instructions. Separate encoding informationAkira Hatanaka
from the rest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170649 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20[mips] Refactor arithmetic and logic instructions with immediate operands.Akira Hatanaka
Separate encoding information from the rest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170648 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20[mips] Refactor arithmetic and logic instructions. Separate encodingAkira Hatanaka
information from the rest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170647 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20docs: Show TOC for GettingStarted.rst.Sean Silva
This is a pretty lengthy document, so put the table of contents in your face so that it's easier to scope out the content. This document is a mess currently and needs to be refactored/revised/split-up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170646 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20[mips] Delete ArithOverflowR and ArithOverflow and use ArithLogicR andAkira Hatanaka
ArithLogicI as the instruction base classes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170642 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20docs: Clean up adornments.Sean Silva
For whatever reason the usage of '^^^' and '---' adornments were reversed compared to the "canonical" style of the LLVM docs (which is currently "the style used in SphinxQuickstartTemplate.rst"). This change doesn't affect the document structure at all, I'm just doing it for trivial stylistic consistency (the document content is *much* more important---thanks Nadav for writing this up!). Also, trim the adornments to be the same length as the section names. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170638 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20docs: ASCII-fySean Silva
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170637 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Loop Vectorizer: Enable if-conversion.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170632 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20s/AttributesImpl/AttributeImpl/g This is going to apply to Attribute, not ↵Bill Wendling
Attributes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170631 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Do not introduce vector operations in functions marked with noimplicitfloat.Bob Wilson
<rdar://problem/12879313> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170630 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Clean up some DOxygen comments.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170629 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Clean up some DOxygen comments.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170628 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Fix an uninitialized member variable, found by -fsanitize=bool.Richard Smith
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170627 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20whitespaceNadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170626 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20doc: resize the image.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170622 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Target/R600: Update MIB according to r170588.NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170620 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Doc: update the chart.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170618 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19Add a context so that once we uniquify strings we can access them easily.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170615 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19MC: Add MCInstrDesc::mayAffectControlFlow() method.Jim Grosbach
MC disassembler clients (LLDB) are interested in querying if an instruction may affect control flow other than by virtue of being an explicit branch instruction. For example, instructions which write directly to the PC on some architectures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170610 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19Add isSubRegisterEq() and isSuperRegisterEq().Jim Grosbach
isSub and isSuper return false if RegA == RegB. Add variants which also include the identity function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170609 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19Move isSubRegister() and isSuperRegister to MCRegisterInfo.Jim Grosbach
These were defined on TargetRegisterInfo, but they don't use any information that's not available in MCRegisterInfo, so sink them down to be available at the MC layer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170608 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19Fix doc comment. '///' not '//'.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170607 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19Refactor isIntrinsic() to be quicker, and change classof() (and thus, ↵Michael Ilseman
isa<IntrinsicInst>()) to use it. This decreases the number of occurrences of the slow-path string matching performed by getIntrinsicID(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170602 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19Fix LLVM trap test to follow the NaCl encoding.JF Bastien
I'll update pnacl/scripts/lit_known_failures.txt at the same time as I update the DEPS. BUG= https://code.google.com/p/nativeclient/issues/detail?id=3168 https://code.google.com/p/nativeclient/issues/detail?id=1711 R= eliben@chromium.org TESTS= ./pnacl/build/llvm_x86_64/Release+Asserts/bin/llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding ./pnacl/git/llvm/test/MC/ARM/arm_instructions.s | ./pnacl/build/llvm_x86_64/Release+Asserts/bin/FileCheck ./pnacl/git/llvm/test/MC/ARM/arm_instructions.s Review URL: https://codereview.chromium.org/11635031
2012-12-19s/AttributeListImpl/AttributeSetImpl/g to match the namechange of AttributeList.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170600 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19Always use addOperand(MF, MO) from MachineInstrBuilder.Jakob Stoklund Olesen
The single-argument MachineInstr::addOperand(MO) will be removed soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170599 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19Add a missing 'else'. Found by grep '} if'Dmitri Gribenko
No testcase because it is apparently not so trivial to construct. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170595 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19R600: Add entry in CODE_OWNERS.TXTTom Stellard
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170594 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19R600: Remove unecessary VREG alignment.Tom Stellard
Unlike SGPRs VGPRs doesn't need to be aligned. Patch by: Christian König Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Christian König <deathsimple@vodafone.de> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170593 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19R600: control flow optimizationTom Stellard
Branch if we have enough instructions so that it makes sense. Also remove branches if they don't make sense. Patch by: Christian König Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Christian König <deathsimple@vodafone.de> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170592 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19R600: New control flow for SI v2Tom Stellard
This patch replaces the control flow handling with a new pass which structurize the graph before transforming it to machine instruction. This has a couple of different advantages and currently fixes 20 piglit tests without a single regression. It is now a general purpose transformation that could be not only be used for SI/R6xx, but also for other hardware implementations that use a form of structurized control flow. v2: further cleanup, fixes and documentation Patch by: Christian König Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170591 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19Split out abbreviations for the skeleton info from the rest ofEric Christopher
the abbreviations. Part of implementing split dwarf. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170589 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19Remove the explicit MachineInstrBuilder(MI) constructor.Jakob Stoklund Olesen
Use the version that also takes an MF reference instead. It would technically be possible to extract an MF reference from the MI as MI->getParent()->getParent(), but that would not work for MIs that are not inserted into any basic block. Given the reasonably small number of places this constructor was used at all, I preferred the compile time check to a run time assertion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170588 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19Fix a bug that was found by building clang with -fsanitize.Nadav Rotem
I introduced it in r166785. PR14291. If TD is unavailable use getScalarSizeInBits, but don't optimize pointers or vectors of pointers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170586 91177308-0d34-0410-b5e6-96231b3b80d8