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2013-02-08Revert 172027 and 174336. Remove diagnostics about over-aligned stack objects.Bob Wilson
Aside from the question of whether we report a warning or an error when we can't satisfy a requested stack object alignment, the current implementation of this is not good. We're not providing any source location in the diagnostics and the current warning is not connected to any warning group so you can't control it. We could improve the source location somewhat, but we can do a much better job if this check is implemented in the front-end, so let's do that instead. <rdar://problem/13127907> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174741 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08Update PowerPC links in CompilerWriterInfo.rstHal Finkel
This updates the current references to links that work for me. In the future, we should update the list of references itself to provide information on newer architecture variants. Thanks to Sean Silva for pointing out that the current links were broken! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174739 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08Refine fix to bug 15041.Bill Schmidt
Thanks to help from Nadav and Hal, I have a more reasonable (and even correct!) approach. This specifically penalizes the insertelement and extractelement operations for the performance hit that will occur on PowerPC processors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174725 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08[SimplifyLibCalls] Library call simplification doen't work if the call site Chad Rosier
isn't using the default calling convention. However, if the transformation is from a call to inline IR, then the calling convention doesn't matter. rdar://13157990 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174724 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08Typos.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174723 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08The patch to fix some issues in r174543 fixed the lines failing the test, ↵David Tweed
but missed a couple of lines which weren't being explicitly looked at and were printing incorrect results. These values clearly must lie within 32 bits, so the casts are definitely safe. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174717 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08ARM cost model: Address computation in vector mem ops not freeArnold Schwaighofer
Adds a function to target transform info to query for the cost of address computation. The cost model analysis pass now also queries this interface. The code in LoopVectorize adds the cost of address computation as part of the memory instruction cost calculation. Only there, we know whether the instruction will be scalarized or not. Increase the penality for inserting in to D registers on swift. This becomes necessary because we now always assume that address computation has a cost and three is a closer value to the architecture. radar://13097204 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174713 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08Update tests for DWARF parser: store sources next to pre-built object files ↵Alexey Samsonov
and provide build instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174711 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08Test CommitMichael Kuperstein
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174709 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08Parse the attribute group reference on a function.Bill Wendling
Attribute references are of this form: define void @foo() #0 #1 #2 { ... } Parse them for function attributes. If there's more than one reference, then they are merged together. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174697 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08When Mips16 frames grow large, the immediate field may exceed the maximumReed Kotler
allowed size for the instruction. This code uses RegScavenger to fix this. We sometimes need 2 registers for Mips16 so we must handle things differently than how register scavenger is normally used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174696 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08Revert "Have InstCombine call SipmlifyCall when handling calls. Test case ↵Andrew Trick
included." This reverts commit 3854a5d90fee52af1065edbed34521fff6cdc18d. This causes a clang unit test to hang: vtable-available-externally.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174692 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08[readobj] Fix memory leak.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174687 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08Use ParseFnAttributeValuePairs instead of ParseOptionalFuncAttrs Bill Wendling
The functionality of ParseOptionalFuncAttrs was there in ParseFnAttributeValuePairs. So just use that instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174686 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07[Object][ELF] Add a way to get the dynamic symbol table section.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174682 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07[Object][ELF] Add {begin,end}_elf_dynamic_symbols to non-virtually iterate ↵Michael J. Spencer
over dynamic symbols. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174681 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07Have InstCombine call SipmlifyCall when handling calls. Test case included.Michael Ilseman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174675 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07fix 80-col violation and fix the docs.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174671 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07[lit] Add a display function for lit.Test.TestResult.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174667 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07[mips] Make Filler a class and reduce indentation.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174666 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07Formatting.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174664 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07"Clean up" line section symbol emission by emitting the sectionEric Christopher
syms before constructing the compile units so we're not emitting section references to sections not there already. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174663 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07[patch] bug 15055 Add Unistd.h to OProfileWrapper.cppWill Schmidt
Add #include <unistd.h> to OProfileWrapper.cpp. This provides the declarations for 'read' and 'close' that are otherwise missing, and result in 'error: <foo> was not declared in this scope'. This matches the issue as reported in bug 15055 "Can no longer compile LLVM with --with-oprofile" git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174661 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07Constrain PowerPC autovectorization to fix bug 15041.Bill Schmidt
Certain vector operations don't vectorize well with the current PowerPC implementation. Element insert/extract performs poorly without VSX support because Altivec requires going through memory. SREM, UREM, and VSELECT all produce bad scalar code. There's a lot of work to do for the cost model before autovectorization will be tuned well, and this is not an attempt to address the larger problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174660 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07[mips] Add definition of JALR instruction which has two register operands. ↵Akira Hatanaka
Change the original JALR instruction with one register operand to be a pseudo-instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174657 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07R600/SI: cleanup VGPR encodingTom Stellard
Remove all the unused code. Patch by: Christian König Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174656 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07R600/SI: Handle VGPR64 destination in copyPhysReg().Tom Stellard
Allows nexuiz to run with radeonsi. Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174655 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07R600/SI: Add pattern for mul.Tom Stellard
20 more little piglits with radeonsi. Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174654 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07R600/SI: simplify and fix SMRD encodingTom Stellard
The _SGPR variants where wrong. Patch by: Christian König Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174653 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07R600/SI: add proper 64bit immediate support v2Tom Stellard
v2: rebased on current upstream Patch by: Christian König Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174652 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07R600: Add an explicit default processorTom Stellard
This is for the case when no processor is passed to the backend. This prevents the '' is not a recognized processor for this target (ignoring processor) warning from being generated by clang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174651 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07Identify and simplify idempotent intrinsics. Test case included.Michael Ilseman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174650 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07Loop Vectorizer: Refactor Memory Cost ComputationArnold Schwaighofer
We don't want too many classes in a pass and the classes obscure the details. I was going a little overboard with object modeling here. Replace classes by generic code that handles both loads and stores. No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174646 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07ADT: Correct APInt::getActiveWords for zero valuesMeador Inge
PR15138 was opened because of a segfault in the Bitcode writer. The actual issue ended up being a bug in APInt where calls to APInt::getActiveWords returns a bogus value when the APInt value is 0. This patch fixes the problem by ensuring that getActiveWords returns 1 for 0 valued APInts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174641 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07[Object][ELF] Fix crash on no dynamic section.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174639 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07R600/SI: Use proper instructions for array/shadow samplers.Tom Stellard
Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174634 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07R600/SI: Make sample intrinsic address parameter type overloaded.Tom Stellard
Handle vectors of 1 to 16 integers. Change the intrinsic names to prevent the wrong one from being selected at runtime due to the overloading. Patch By: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174633 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07R600/SI: Add basic support for more integer vector types.Tom Stellard
v1i32, v2i32, v8i32 and v16i32. Only add VGPR register classes for integer vector types, to avoid attempts copying from VGPR to SGPR registers, which is not possible. Patch By: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174632 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07ARM cost model: Add costs for vector selectsArnold Schwaighofer
Vector selects are cheap on NEON. They get lowered to a vbsl instruction. radar://13158753 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174631 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07R600/SI: Add pattern for flog2Michel Danzer
22 more little piglits with radeonsi. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174615 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07FDE::dumpHeader(): Forgot to fix one more formatting, ... take two!NAKAMURA Takumi
Excuse me, I could not test it locally. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174614 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07R600: Consolidate sub register indices.Tom Stellard
Use sub0-15 everywhere. Patch by: Michel Dänzerr Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174610 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07R600: Add support for SET*_DX10 instructionsTom Stellard
These instructions compare two floating point values and return an integer true (-1) or false (0) value. When compiling code generated by the Mesa GLSL frontend, the SET*_DX10 instructions save us four instructions for most branch decisions that use floating-point comparisons. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174609 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07R600: Add tests for unsupported condition codes.Tom Stellard
All of the le and lt variants are unsupported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174608 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07R600: Fix assembly name for SETGT_INTTom Stellard
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174607 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07FDE::dumpHeader(): Forgot to fix one more formatting. It affected bigendian ↵NAKAMURA Takumi
hosts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174602 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07Remove this testcase until I can figure out how to properly conditionalize it.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174591 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07Another attempt at getting the XFAIL line right for this test.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174588 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07[ReleaseNotes] tidy up organization and formattingSean Silva
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174587 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07Update Release notes regarding TTI.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174586 91177308-0d34-0410-b5e6-96231b3b80d8
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