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2013-04-22No really, don't store anything to this since it's unconditionallyEric Christopher
set below. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180015 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22Remove variable store that is never read.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180014 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22Remove variable store that is never read.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180013 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22Fix for 5.5 Parameter Passing --> Stage C:Stepan Dyatkovskiy
-- C.4 and C.5 statements, when NSAA is not equal to SP. -- C.1.cp statement for VA functions. Note: There are no VFP CPRCs in a variadic procedure. Before this patch "NSAA != 0" means "don't use GPRs anymore ". But there are some exceptions in AAPCS. 1. For non VA function: allocate all VFP regs for CPRC. When all VFPs are allocated CPRCs would be sent to stack, while non CPRCs may be still allocated in GRPs. 2. Check that for VA functions all params uses GPRs and then stack. No exceptions, no CPRCs here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180011 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22Add .ll as a valid test suffix for Object, this allows .ll -> objectEric Christopher
and then dumping as tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180010 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22Add the same todo about a command iterator interface into theEric Christopher
other mach-o object file as well. TODO: One interface to rule them all. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180009 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22Add a TODO about wanting an iterator interface.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180008 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22llvm-readobj: Dump more COFF auxiliary recordsNico Rieck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180007 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22llvm-readobj: Check for null section pointerNico Rieck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180006 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22llvm-readobj: Do not print NULL StringRefsNico Rieck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180005 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22Cleanup: test source files do not need to be executableArnaud A. de Grandmaison
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180003 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22Tidy.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180000 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22Update comment. Whitespace.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179999 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22Revert "Revert "PR14606: debug info imported_module support""David Blaikie
This reverts commit r179840 with a fix to test/DebugInfo/two-cus-from-same-file.ll I'm not sure why that test only failed on ARM & MIPS and not X86 Linux, even though the debug info was clearly invalid on all of them, but this ought to fix it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179996 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22Convert windows line endings to linux/unix line endings.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179995 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22Fix indentation. No functional change.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179994 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22Put 'else' on same line as preceding curly brace per coding standards. No ↵Craig Topper
functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179993 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22Remove an unreachable 'break' following a 'return'.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179991 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21Legalize vector truncates by parts rather than just splitting.Jim Grosbach
Rather than just splitting the input type and hoping for the best, apply a bit more cleverness. Just splitting the types until the source is legal often leads to an illegal result time, which is then widened and a scalarization step is introduced which leads to truly horrible code generation. With the loop vectorizer, these sorts of operations are much more common, and so it's worth extra effort to do them well. Add a legalization hook for the operands of a TRUNCATE node, which will be encountered after the result type has been legalized, but if the operand type is still illegal. If simple splitting of both types ends up with the result type of each half still being legal, just do that (v16i16 -> v16i8 on ARM, for example). If, however, that would result in an illegal result type (v8i32 -> v8i8 on ARM, for example), we can get more clever with power-two vectors. Specifically, split the input type, but also widen the result element size, then concatenate the halves and truncate again. For example on ARM, To perform a "%res = v8i8 trunc v8i32 %in" we transform to: %inlo = v4i32 extract_subvector %in, 0 %inhi = v4i32 extract_subvector %in, 4 %lo16 = v4i16 trunc v4i32 %inlo %hi16 = v4i16 trunc v4i32 %inhi %in16 = v8i16 concat_vectors v4i16 %lo16, v4i16 %hi16 %res = v8i8 trunc v8i16 %in16 This allows instruction selection to generate three VMOVN instructions instead of a sequences of moves, stores and loads. Update the ARMTargetTransformInfo to take this improved legalization into account. Consider the simplified IR: define <16 x i8> @test1(<16 x i32>* %ap) { %a = load <16 x i32>* %ap %tmp = trunc <16 x i32> %a to <16 x i8> ret <16 x i8> %tmp } define <8 x i8> @test2(<8 x i32>* %ap) { %a = load <8 x i32>* %ap %tmp = trunc <8 x i32> %a to <8 x i8> ret <8 x i8> %tmp } Previously, we would generate the truly hideous: .syntax unified .section __TEXT,__text,regular,pure_instructions .globl _test1 .align 2 _test1: @ @test1 @ BB#0: push {r7} mov r7, sp sub sp, sp, #20 bic sp, sp, #7 add r1, r0, #48 add r2, r0, #32 vld1.64 {d24, d25}, [r0:128] vld1.64 {d16, d17}, [r1:128] vld1.64 {d18, d19}, [r2:128] add r1, r0, #16 vmovn.i32 d22, q8 vld1.64 {d16, d17}, [r1:128] vmovn.i32 d20, q9 vmovn.i32 d18, q12 vmov.u16 r0, d22[3] strb r0, [sp, #15] vmov.u16 r0, d22[2] strb r0, [sp, #14] vmov.u16 r0, d22[1] strb r0, [sp, #13] vmov.u16 r0, d22[0] vmovn.i32 d16, q8 strb r0, [sp, #12] vmov.u16 r0, d20[3] strb r0, [sp, #11] vmov.u16 r0, d20[2] strb r0, [sp, #10] vmov.u16 r0, d20[1] strb r0, [sp, #9] vmov.u16 r0, d20[0] strb r0, [sp, #8] vmov.u16 r0, d18[3] strb r0, [sp, #3] vmov.u16 r0, d18[2] strb r0, [sp, #2] vmov.u16 r0, d18[1] strb r0, [sp, #1] vmov.u16 r0, d18[0] strb r0, [sp] vmov.u16 r0, d16[3] strb r0, [sp, #7] vmov.u16 r0, d16[2] strb r0, [sp, #6] vmov.u16 r0, d16[1] strb r0, [sp, #5] vmov.u16 r0, d16[0] strb r0, [sp, #4] vldmia sp, {d16, d17} vmov r0, r1, d16 vmov r2, r3, d17 mov sp, r7 pop {r7} bx lr .globl _test2 .align 2 _test2: @ @test2 @ BB#0: push {r7} mov r7, sp sub sp, sp, #12 bic sp, sp, #7 vld1.64 {d16, d17}, [r0:128] add r0, r0, #16 vld1.64 {d20, d21}, [r0:128] vmovn.i32 d18, q8 vmov.u16 r0, d18[3] vmovn.i32 d16, q10 strb r0, [sp, #3] vmov.u16 r0, d18[2] strb r0, [sp, #2] vmov.u16 r0, d18[1] strb r0, [sp, #1] vmov.u16 r0, d18[0] strb r0, [sp] vmov.u16 r0, d16[3] strb r0, [sp, #7] vmov.u16 r0, d16[2] strb r0, [sp, #6] vmov.u16 r0, d16[1] strb r0, [sp, #5] vmov.u16 r0, d16[0] strb r0, [sp, #4] ldm sp, {r0, r1} mov sp, r7 pop {r7} bx lr Now, however, we generate the much more straightforward: .syntax unified .section __TEXT,__text,regular,pure_instructions .globl _test1 .align 2 _test1: @ @test1 @ BB#0: add r1, r0, #48 add r2, r0, #32 vld1.64 {d20, d21}, [r0:128] vld1.64 {d16, d17}, [r1:128] add r1, r0, #16 vld1.64 {d18, d19}, [r2:128] vld1.64 {d22, d23}, [r1:128] vmovn.i32 d17, q8 vmovn.i32 d16, q9 vmovn.i32 d18, q10 vmovn.i32 d19, q11 vmovn.i16 d17, q8 vmovn.i16 d16, q9 vmov r0, r1, d16 vmov r2, r3, d17 bx lr .globl _test2 .align 2 _test2: @ @test2 @ BB#0: vld1.64 {d16, d17}, [r0:128] add r0, r0, #16 vld1.64 {d18, d19}, [r0:128] vmovn.i32 d16, q8 vmovn.i32 d17, q9 vmovn.i16 d16, q8 vmov r0, r1, d16 bx lr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179989 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21ARM: Split out cost model vcvt testcases.Jim Grosbach
They had a separate RUN line already, so may as well be in a separate file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179988 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21Passing arguments to varags functions under the SPARC v9 ABI.Jakob Stoklund Olesen
Arguments after the fixed arguments never use the floating point registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179987 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21Tidy up comment grammar.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179986 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21Fix the SETHIimm pattern for 64-bit code.Jakob Stoklund Olesen
Don't ignore the high 32 bits of the immediate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179985 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21Remove unused, undefined ArgFlagsTy::getArgFlagsString; add a comment about ↵Stephen Lin
'returned' git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179983 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21SROA: Don't crash on a select with two identical operands.Benjamin Kramer
This is an edge case that can happen if we modify a chain of multiple selects. Update all operands in that case and remove the assert. PR15805. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179982 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21Revert "SimplifyCFG: If convert single conditional stores"Arnold Schwaighofer
There is the temptation to make this tranform dependent on target information as it is not going to be beneficial on all (sub)targets. Therefore, we should probably do this in MI Early-Ifconversion. This reverts commit r179957. Original commit message: "SimplifyCFG: If convert single conditional stores This transformation will transform a conditional store with a preceeding uncondtional store to the same location: a[i] = may-alias with a[i] load if (cond) a[i] = Y into an unconditional store. a[i] = X may-alias with a[i] load tmp = cond ? Y : X; a[i] = tmp We assume that on average the cost of a mispredicted branch is going to be higher than the cost of a second store to the same location, and that the secondary benefits of creating a bigger basic block for other optimizations to work on outway the potential case were the branch would be correctly predicted and the cost of the executing the second store would be noticably reflected in performance. hmmer's execution time improves by 30% on an imac12,2 on ref data sets. With this change we are on par with gcc's performance (gcc also performs this transformation). There was a 1.2 % performance improvement on a ARM swift chip. Other tests in the test-suite+external seem to be mostly uninfluenced in my experiments: This optimization was triggered on 41 tests such that the executable was different before/after the patch. Only 1 out of the 40 tests (dealII) was reproducable below 100% (by about .4%). Given that hmmer benefits so much I believe this to be a fair trade off. I am going to watch performance numbers across the builtbots and will revert this if anything unexpected comes up." git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179980 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21ARM: fix part of test which actually needed an asserts buildTim Northover
This should fix a buildbot failure that occurred after r179977. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179978 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21ARM: Use ldrd/strd to spill 64-bit pairs when available.Tim Northover
This allows common sp-offsets to be part of the instruction and is probably faster on modern CPUs too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179977 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21Remove the executable bit on cmake filesSylvestre Ledru
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179976 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21SLPVectorize: Add support for vectorization of casts.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179975 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21SLPVectorizer: Fix a bug in the code that scans the tree in search of nodes ↵Nadav Rotem
with multiple users. We did not terminate the switch case and we executed the search routine twice. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179974 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21[objc-arc] Cleaned up tail-call-invariant-enforcement.ll.Michael Gottesman
Specifically: 1. Added checks that unwind is being properly added to various instructions. 2. Fixed the declaration/calling of objc_release to have a return type of void. 3. Moved all checks to precede the functions and added checks to ensure that the checks would only match inside the specific function that we are attempting to check. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179973 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21[objc-arc] Check that objc-arc-expand properly handles all strictly ↵Michael Gottesman
forwarding calls and does not touch calls which are not strictly forwarding (i.e. objc_retainBlock). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179972 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21[objc-arc] Renamed the test file ↵Michael Gottesman
clang-arc-used-intrinsic-removed-if-isolated.ll -> intrinsic-use-isolated.ll to match the other test file intrinsic-use.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179971 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21Remove tbaa metadata.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179970 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21When we strength reduce an objc_retainBlock call to objc_retain, increment ↵Michael Gottesman
NumPeeps and make sure that Changed is set to true. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179968 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21Fixed comment typo.Michael Gottesman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179967 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21[objc-arc] Fixed typo in debug message.Michael Gottesman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179966 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21[objc-arc] Fixed comment typo.Michael Gottesman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179965 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21[objc-arc] Refactored OptimizeReturns so that it uses continue instead of a ↵Michael Gottesman
large multi-level nested if statement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179964 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20[objc-arc] Added debug statement saying when we are resetting a sequence's ↵Michael Gottesman
progress. This will make it clearer when we are actually resetting a sequence's progress vs just changing state. This is an important distinction because the former case clears any pointers that we are tracking while the later does not. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179963 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Compile varargs functions for SPARCv9.Jakob Stoklund Olesen
With a little help from the frontend, it looks like the standard va_* intrinsics can do the job. Also clean up an old bitcast hack in LowerVAARG that dealt with unaligned double loads. Load SDNodes can specify an alignment now. Still missing: Calling varargs functions with float arguments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179961 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Fix PR15800. Do not try to vectorize vectors and structs.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179960 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20SimplifyCFG: If convert single conditional storesArnold Schwaighofer
This transformation will transform a conditional store with a preceeding uncondtional store to the same location: a[i] = may-alias with a[i] load if (cond) a[i] = Y into an unconditional store. a[i] = X may-alias with a[i] load tmp = cond ? Y : X; a[i] = tmp We assume that on average the cost of a mispredicted branch is going to be higher than the cost of a second store to the same location, and that the secondary benefits of creating a bigger basic block for other optimizations to work on outway the potential case were the branch would be correctly predicted and the cost of the executing the second store would be noticably reflected in performance. hmmer's execution time improves by 30% on an imac12,2 on ref data sets. With this change we are on par with gcc's performance (gcc also performs this transformation). There was a 1.2 % performance improvement on a ARM swift chip. Other tests in the test-suite+external seem to be mostly uninfluenced in my experiments: This optimization was triggered on 41 tests such that the executable was different before/after the patch. Only 1 out of the 40 tests (dealII) was reproducable below 100% (by about .4%). Given that hmmer benefits so much I believe this to be a fair trade off. I am going to watch performance numbers across the builtbots and will revert this if anything unexpected comes up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179957 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20ARM: don't add FrameIndex offset for LDMIA (has no immediate)Tim Northover
Previously, when spilling 64-bit paired registers, an LDMIA with both a FrameIndex and an offset was produced. This kind of instruction shouldn't exist, and the extra operand was being confused with the predicate, causing aborts later on. This removes the invalid 0-offset from the instruction being produced. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179956 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20recommit testsNuno Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179955 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Minor renaming of tests (for consistency with an in-development patch)Stephen Lin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179954 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20AArch64: remove useless commentTim Northover
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179952 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Move 'kw_align' case to proper section, reorganize function attribute ↵Stephen Lin
keyword case statements to be consistent with r179119 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179948 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Remove unused ShouldFoldAtomicFences flag.Tim Northover
I think it's almost impossible to fold atomic fences profitably under LLVM/C++11 semantics. As a result, this is now unused and just cluttering up the target interface. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179940 91177308-0d34-0410-b5e6-96231b3b80d8
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