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2010-11-04System: Add llvm_execute_on_thread, which does what it says.Daniel Dunbar
- Primarily useful for running some code with a specified stack size, when pthreads are available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118222 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-04Add ARM fixup info for load/store label references. Probably will need a bit ofJim Grosbach
tweaking when we start using it for object file emission or JIT, but it's a start. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118221 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-04Add encoding for VSTR.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118220 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-04strength reduce some code, resolving a fixme.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118219 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-04take a big step to making aliases more general and less of a hack:Chris Lattner
now matchables contain an explicit list of how to populate each operand in the result instruction instead of having them somehow magically be correlated to the input inst. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118217 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-04Disable fancy splitting during spilling unless -extra-spiller-splits is given.Jakob Stoklund Olesen
This way, InlineSpiller does the same amount of splitting as the standard spiller. Splitting should really be guided by the register allocator, and doesn't belong in the spiller at all. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118216 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Teach ARM Target to use the tblgen support for generating an MC'izedJim Grosbach
CodeEmitter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118209 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Add rule to build MC'ized CodeEmitter.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118207 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Support generating an MC'ized CodeEmitter directly. Maintain a reference to theJim Grosbach
Fixups list for the instruction so the operand encoders can add to it as needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118206 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Covert VORRIMM to be produced via early target-specific DAG combining, ↵Owen Anderson
rather than legalization. This is both the conceptually correct place for it, as well as allowing it to be more aggressive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118204 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Add support for code generation of the one register with immediate form of vorr.Owen Anderson
We could be more aggressive about making this work for a larger range of constants, but this seems like a good start. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118201 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03trailing whitespaceJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118199 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Just return undef for invalid masks or elts, and since we're doing that,Eric Christopher
just do it earlier too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118195 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Let RegAllocBasic require MachineDominators - they are already available andJakob Stoklund Olesen
splitting needs them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118194 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Tag debug output as regallocJakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118193 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Optimize generated code for integer materialization a bit.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118192 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03rename Operand -> AsmOperand for clarity.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118190 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Fix test.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118187 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Unlike a lot of NEON instructions, vext isn't _actually_ parameterized by ↵Owen Anderson
element size. Instead, all of the different element sizes are pseudo instructions that map down to vext.8 underneath, with the immediate shifted left to reflect the increased element size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118183 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03This test assumes SSE is present; that is not the defaultDale Johannesen
on non-X86 hosts. Hopefully fixes ppc-host buildbot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118182 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Add codegen patterns for VST1-lane instructions. Radar 8599955.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118176 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Check for extractelement with a variable operand for the element number.Bob Wilson
For NEON we had been assuming this was always an immediate constant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118175 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Rename FindExecutable to PrependMainExecutablePath.Mikhail Glushenkov
Makes it more clear that it is just a path manipulation function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118174 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-0380-col violations, trailing whitespace.Mikhail Glushenkov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118173 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Rename PointsToLocalMemory to PointsToLocalOrConstantMemory to makeDuncan Sands
the code more self-documenting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118171 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Simplify uses of MVT and EVT. An MVT can be compared directlyDuncan Sands
with a SimpleValueType, while an EVT supports equality and inequality comparisons with SimpleValueType. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118169 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Fix a comment typo.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118168 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Inside the calling convention logic LocVT is always a simpleDuncan Sands
value type, so there is no point in passing it around using an EVT. Use the simpler MVT everywhere. Rather than trying to propagate this information maximally in all the code that using the calling convention stuff, I chose to do a mainly low impact change instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118167 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03If we have an undef mask our Elt will be -1 for our access, handleEric Christopher
this by using an undef as a pointer. Fixes rdar://8625016 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118164 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Fix typo, pointed out by Trevor Harmon.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118163 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Fix preload instruction isel. Only v7 supports pli, and only v7 with mp ↵Evan Cheng
extension supports pldw. Add subtarget attribute to denote mp extension support and legalize illegal ones to nothing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118160 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Add support to match @llvm.prefetch to pld / pldw / pli. rdar://8601536.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118152 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Put the PC encoding in the correct bit position.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118151 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Invert these branches by default, it makes assembly comparisons a littleEric Christopher
easier to read. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118148 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03The MC code couldn't handle ARM LDR instructions with negative offsets:Bill Wendling
vldr.64 d1, [r0, #-32] The problem was with how the addressing mode 5 encodes the offsets. This change makes sure that the way offsets are handled in addressing mode 5 is consistent throughout the MC code. It involves re-refactoring the "getAddrModeImmOpValue" method into an "Imm12" and "addressing mode 5" version. But not to worry! The majority of the duplicated code has been unified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118144 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Fix DAGCombiner to avoid going into an infinite loop when itDan Gohman
encounters (and:i64 (shl:i64 (load:i64), 1), 0xffffffff). This fixes rdar://8606584. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118143 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Remove unused function.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118141 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Remove the no longer used 'Modifier' optional operand to the ARMJim Grosbach
printOperand() asm printer helper functions. rdar://8425198 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118140 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Remove unused function.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118139 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Break ARM addrmode4 (load/store multiple base address) into its constituentJim Grosbach
parts. Represent the operation mode as an optional operand instead. rdar://8614429 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118137 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Two sets of changes. Sorry they are intermingled.Evan Cheng
1. Fix pre-ra scheduler so it doesn't try to push instructions above calls to "optimize for latency". Call instructions don't have the right latency and this is more likely to use introduce spills. 2. Fix if-converter cost function. For ARM, it should use instruction latencies, not # of micro-ops since multi-latency instructions is completely executed even when the predicate is false. Also, some instruction will be "slower" when they are predicated due to the register def becoming implicit input. rdar://8598427 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118135 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Modify scheduling itineraries to correct instruction latencies (not operandEvan Cheng
latencies) of loads. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118134 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Factor code out of APInt to form a isUIntN helper function.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118133 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03fix typo, patch by Trevor Harmon (PR8537)Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118131 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Print an error as one big string instead of breaking it up.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118130 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Delete unused variables.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118128 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03Remove several unhelpful checks for isValid from sys::Path.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118127 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02Make sure we're only storing a single bit here.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118126 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02per a suggestion by Frits van Bommel, mark all MBlaze Pseudo Chris Lattner
instructions as isCodeGenOnly in the parent class instead of sprinkling it throughout the .td files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118125 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02chase owen.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118124 91177308-0d34-0410-b5e6-96231b3b80d8
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