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2012-10-17Update the release notes about the new loop vectorizer.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166113 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Add a loop vectorizer.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166112 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Check for empty YMM use-def lists in X86VZeroUpper.Jakob Stoklund Olesen
The previous MRI.isPhysRegUsed(YMM0) would also return true when the function contains a call to a function that may clobber YMM0. That's most of them. Checking the use-def chains allows us to skip functions that don't explicitly mention YMM registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166110 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Fix fallout from RegInfo => FrameLowering refactoring on MSP430.Anton Korobeynikov
Patch by Job Noorman! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166108 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17misched: Better handling of invalid latencies in the machine modelAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166107 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17docs: Add link to integrated assembler HowToSean Silva
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166106 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Support: Don't remove special files on signals.Daniel Dunbar
- Similar to Path::eraseFromDisk(), we don't want LLVM to remove things like /dev/null, even if it has the permission. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166105 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17[asan] better debug diagnostics in asan compiler moduleKostya Serebryany
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166102 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17This just in, it is a *bad idea* to use 'udiv' on an offset ofChandler Carruth
a pointer. A very bad idea. Let's not do that. Fixes PR14105. Note that this wasn't *that* glaring of an oversight. Originally, these routines were only called on offsets within an alloca, which are intrinsically positive. But over the evolution of the pass, they ended up being called for arbitrary offsets, and things went downhill... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166095 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Marked this variable as 'used' so that LTO doesn't get rid of it.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166092 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Fix a really annoying "bug" introduced in r165941. The change from thatChandler Carruth
revision makes no sense. We cannot use the address space of the *post indexed* type to conclude anything about a *pre indexed* pointer type's size. More importantly, this index can never be over a pointer. We are indexing over arrays and vectors here. Of course, I have no test case here. Neither did the original patch. =/ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166091 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Remove LLVM_DELETED_FUNCTION from destructors that override non-deleted base ↵Craig Topper
class destructors. This isn't legal by the C++11 standard and clang now checks for it. Curiously gcc didn't catch this, possibly because of the template usage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166089 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Check SSSE3 instead of SSE4.1Michael Liao
- All shuffle insns required, especially PSHUB, are added in SSSE3. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166086 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Fix setjmp on models with non-Small code model nor non-Static relocation modelMichael Liao
- MBB address is only valid as an immediate value in Small & Static code/relocation models. On other models, LEA is needed to load IP address of the restore MBB. - A minor fix of MBB in MC lowering is added as well to enable target relocation flag being propagated into MC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166084 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Use a SparseSet instead of a BitVector for UsedInInstr in RAFast.Jakob Stoklund Olesen
This is just as fast, and it makes it possible to avoid leaking the UsedPhysRegs BitVector implementation through MachineRegisterInfo::addPhysRegsUsed(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166083 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Use a typedef to reduce some typing and reformat code accordingly.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166077 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Variable name cleanup.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166076 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Formatting and 80-col.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166075 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Spacing.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166074 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Avoid rematerializing a redef immediately after the old def.Jakob Stoklund Olesen
PR14098 contains an example where we would rematerialize a MOV8ri immediately after the original instruction: %vreg7:sub_8bit<def> = MOV8ri 9; GR32_ABCD:%vreg7 %vreg22:sub_8bit<def> = MOV8ri 9; GR32_ABCD:%vreg7 Besides being pointless, it is also wrong since the original instruction only redefines part of the register, and the value read by the new instruction is wrong. The problem was the LiveRangeEdit::allUsesAvailableAt() didn't special-case OrigIdx == UseIdx and found the wrong SSA value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166068 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Revert r166046 "Switch back to the old coalescer for now to fix the 32 bit bit"Jakob Stoklund Olesen
A fix for PR14098, including the test case is in the next commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166067 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16[InstCombine] Teach InstCombine how to handle an obfuscated splat.Michael Gottesman
An obfuscated splat is where the frontend poorly generates code for a splat using several different shuffles to create the splat, i.e., %A = load <4 x float>* %in_ptr, align 16 %B = shufflevector <4 x float> %A, <4 x float> undef, <4 x i32> <i32 0, i32 0, i32 undef, i32 undef> %C = shufflevector <4 x float> %B, <4 x float> %A, <4 x i32> <i32 0, i32 1, i32 4, i32 undef> %D = shufflevector <4 x float> %C, <4 x float> %A, <4 x i32> <i32 0, i32 1, i32 2, i32 4> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166061 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16[ms-inline asm] Add the helper function, isParseringInlineAsm(). To be used ↵Chad Rosier
in a future commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166054 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Simplify code. No functionality change.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166053 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Check .rela instead of ELF64 for the compensation vaue resettingMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166051 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-1680-col fixup.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166050 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Teach DAG combine to fold (trunc (fptoXi x)) to (fptoXi x)Michael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166049 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Switch back to the old coalescer for now to fix the 32 bit bitRafael Espindola
llvm+clang+compiler-rt bootstrap. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166046 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Simplify potentially quadratic behavior while erasing elements from std::vector.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166045 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16And now we can call the other 'get' method from this one and not duplicate ↵Bill Wendling
the code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166037 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Support v8f32 to v8i8/vi816 conversion through custom loweringMichael Liao
- Add custom FP_TO_SINT on v8i16 (and v8i8 which is legalized as v8i16 due to vector element-wise widening) to reduce DAG combiner and its overhead added in X86 backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166036 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Use the appropriate Attributes::get method to create an Attributes object.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166035 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Speculative fix the mask constants to be of type uintptr_t. I don't know of ↵Owen Anderson
any case where the old form was incorrect, but I'm more confident that such cases don't exist in this version. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166031 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Fix function parameter spelling in comments. Caught by -Wdocumentation.Dmitri Gribenko
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166024 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16This patch addresses PR13949.Bill Schmidt
For the PowerPC 64-bit ELF Linux ABI, aggregates of size less than 8 bytes are to be passed in the low-order bits ("right-adjusted") of the doubleword register or memory slot assigned to them. A previous patch addressed this for aggregates passed in registers. However, small aggregates passed in the overflow portion of the parameter save area are still being passed left-adjusted. The fix is made in PPCTargetLowering::LowerCall_Darwin_Or_64SVR4 on the caller side, and in PPCTargetLowering::LowerFormalArguments_64SVR4 on the callee side. The main fix on the callee side simply extends existing logic for 1- and 2-byte objects to 1- through 7-byte objects, and correcting a constant left over from 32-bit code. There is also a fix to a bogus calculation of the offset to the following argument in the parameter save area. On the caller side, again a constant left over from 32-bit code is fixed. Additionally, some code for 1, 2, and 4-byte objects is duplicated to handle the 3, 5, 6, and 7-byte objects for SVR4 only. The LowerCall_Darwin_Or_64SVR4 logic is getting fairly convoluted trying to handle both ABIs, and I propose to separate this into two functions in a future patch, at which time the duplication can be removed. The patch adds a new test (structsinmem.ll) to demonstrate correct passing of structures of all seven sizes. Eight dummy parameters are used to force these structures to be in the overflow portion of the parameter save area. As a side effect, this corrects the case when aggregates passed in registers are saved into the first eight doublewords of the parameter save area: Previously they were stored left-justified, and now are properly stored right-justified. This requires changing the expected output of existing test case structsinregs.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166022 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Issue:Stepan Dyatkovskiy
Stack is formed improperly for long structures passed as byval arguments for EABI mode. If we took AAPCS reference, we can found the next statements: A: "If the argument requires double-word alignment (8-byte), the NCRN (Next Core Register Number) is rounded up to the next even register number." (5.5 Parameter Passing, Stage C, C.3). B: "The alignment of an aggregate shall be the alignment of its most-aligned component." (4.3 Composite Types, 4.3.1 Aggregates). So if we have structure with doubles (9 double fields) and 3 Core unused registers (r1, r2, r3): caller should use r2 and r3 registers only. Currently r1,r2,r3 set is used, but it is invalid. Callee VA routine should also use r2 and r3 regs only. All is ok here. This behaviour is guessed by rounding up SP address with ADD+BFC operations. Fix: Main fix is in ARMTargetLowering::HandleByVal. If we detected AAPCS mode and 8 byte alignment, we waste odd registers then. P.S.: I also improved LDRB_POST_IMM regression test. Since ldrb instruction will not generated by current regression test after this patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166018 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Reapply r165661, Patch by Shuxin Yang <shuxin.llvm@gmail.com>.NAKAMURA Takumi
Original message: The attached is the fix to radar://11663049. The optimization can be outlined by following rules: (select (x != c), e, c) -> select (x != c), e, x), (select (x == c), c, e) -> select (x == c), x, e) where the <c> is an integer constant. The reason for this change is that : on x86, conditional-move-from-constant needs two instructions; however, conditional-move-from-register need only one instruction. While the LowerSELECT() sounds to be the most convenient place for this optimization, it turns out to be a bad place. The reason is that by replacing the constant <c> with a symbolic value, it obscure some instruction-combining opportunities which would otherwise be very easy to spot. For that reason, I have to postpone the change to last instruction-combining phase. The change passes the test of "make check-all -C <build-root/test" and "make -C project/test-suite/SingleSource". Original message since r165661: My previous change has a bug: I negated the condition code of a CMOV, and go ahead creating a new CMOV using the *ORIGINAL* condition code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166017 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Cleanup whitespace.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166016 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Fix a bug in the set(I,E)/reset(I,E) methods that I recently added. The ↵Owen Anderson
boundary condition for checking if I and E were in the same word were incorrect, and, beyond that, the mask computation was not using a wide enough constant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166015 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Move X86MCInstLower class definition into implementation file. It's not ↵Craig Topper
needed outside. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166014 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Cleanup whitespace.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166013 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Have AttributesImpl defriend the Attributes class.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166012 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Have AttrBuilder defriend the Attributes class.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166011 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Use the Attributes::get method which takes an AttrVal value directly to ↵Bill Wendling
simplify the code a bit. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166009 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Put simple c'tors inline.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166008 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Pass in the context to the Attributes::get method.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166007 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Fix filename in file header.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166004 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Fix the cpu name and add -verify-machineinstrs.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166003 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16misched: Added handleMove support for updating all kill flags, not just for ↵Andrew Trick
allocatable regs. This is a medium term workaround until we have a more robust solution in the form of a register liveness utility for postRA passes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166001 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Remove unused BitVectors from getAllocatableSet().Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165999 91177308-0d34-0410-b5e6-96231b3b80d8
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