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2012-05-18fix warnings when compiling with -WshadowNick Kledzik
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157061 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Remove duplicate code that we could just fallthrough to.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157060 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Simplify RegisterCoalescer::copyCoalesceInMBB().Jakob Stoklund Olesen
It is no longer necessary to separate VirtCopies, PhysCopies, and ImpDefCopies. Implicitly defined copies are extremely rare after we added the ProcessImplicitDefs pass, and physical register copies are not joined any longer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157059 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18add test case for bugfix in r157032Nuno Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157058 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Add support for the mips 'x' inline asm modifier.Eric Christopher
Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157057 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Remove support for PhysReg joining.Jakob Stoklund Olesen
This has been disabled for a while, and it is not a feature we want to support. Copies between physical and virtual registers are eliminated by good hinting support in the register allocator. Joining virtual and physical registers is really a form of register allocation, and the coalescer is not properly equipped to do that. In particular, it cannot backtrack coalescing decisions, and sometimes that would cause it to create programs that were impossible to register allocate, by exhausting a small register class. It was also very difficult to keep track of the live ranges of aliasing registers when extending the live range of a physreg. By disabling physreg joining, we can let fixed physreg live ranges remain constant throughout the register allocator super-pass. One type of physreg joining remains: A virtual register that has a single value which is a copy of a reserved register can be merged into the reserved physreg. This always lowers register pressure, and since we don't compute live ranges for reserved registers, there are no problems with aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157055 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18FileCheck-ify, apropos of nothingJoel Jones
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157051 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Recommited reworked r156804:Stepan Dyatkovskiy
SelectionDAGBuilder::Clusterify : main functinality was replaced with CRSBuilder::optimize, so big part of Clusterify's code was reduced. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157046 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Simplify code a bit. No functional change intended.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157044 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Simplify handling of v16i8 shuffles and fix a missed optimization.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157043 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Teach two-address pass to update the "source" map so it doesn't perform aEvan Cheng
non-profitable commute using outdated info. The test case would still fail because of poor pre-RA schedule. That will be fixed by MI scheduler. rdar://11472010 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157038 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Temporarily disabled the MCJIT tests for Darwin, because the ↵Danil Malyshev
RuntimeDyldMachO has a problems with relocations for 32bit x86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157035 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Clarify comment.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157033 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18fix corner case in ConstantRange::intersectWith().Nuno Lopes
this fixes the missed optimization I was seeing in the CorrelatedValuePropagation pass git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157032 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Fixed a bug in llvm-objdump when disassembling using -macho option for a binaryKevin Enderby
containing no symbols. Fixed the crash and fixed it not disassembling anything. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157031 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Remove a test that was only testing for physreg joining.Jakob Stoklund Olesen
This is the same as the other tests: Clever tricks are required to make the arguments and return value line up in a single-instruction function. It rarely happens in real life. We have plenty other examples of this behavior. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157030 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17Remove -join-physregs from the test suite.Jakob Stoklund Olesen
This option has been disabled for a while, and it is going away so I can clean up the coalescer code. The tests that required physreg joining to be enabled were almost all of the form "tiny function with interference between arguments and return value". Such functions are usually inlined in the real world. The problem exposed by phys_subreg_coalesce-3.ll is real, but fairly rare. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157027 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17minor simplification in the call to ConstantRange constructorNuno Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157024 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17commentsAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157020 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missingKevin Enderby
the 0b10 mask encoding bits. Make MSR APSR writes without a _<bits> qualifier an alias for MSR APSR_nzcvq even though ARM as deprecated it use. Also add support for suffixes (_nzcvq, _g, _nzcvqg) for APSR versions. Some FIXMEs in the code for better error checking when versions shouldn't be used. rdar://11457025 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157019 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17- Added ExecutionEngine/MCJIT testsDanil Malyshev
- Added HOST_ARCH to Makefile.config.in The HOST_ARCH will be used by MCJIT tests filter, because MCJIT supported only x86 and ARM architectures now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157015 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17Remove extraneous ';'.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157011 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17misched: trace ReadyQ.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157007 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17misched: Added 3-level regpressure back-off.Andrew Trick
Introduce the basic strategy for register pressure scheduling. 1) Respect target limits at all times. 2) Indentify critical register classes (pressure sets). Track pressure within the scheduled region. Avoid increasing scheduled pressure for critical registers. 3) Avoid exceeding the max pressure of the region prior to scheduling. Added logic for picking between the top and bottom ready Q's based on regpressure heuristics. Status: functional but needs to be asjusted to achieve good results. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157006 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17commentAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157005 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17regpressure: Fix getMaxUpwardPressureDelta.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157004 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17misched: fix liveness iteratorsAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157003 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157002 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17Never clear <undef> flags on already joined copies.Jakob Stoklund Olesen
RegisterCoalescer set <undef> flags on all operands of copy instructions that are scheduled to be removed. This is so they won't affect shrinkToUses() by introducing false register reads. Make sure those <undef> flags are never cleared, or shrinkToUses() could cause live intervals to end at instructions about to be deleted. This would be a lot simpler if RegisterCoalescer could just erase joined copies immediately instead of keeping all the to-be-deleted instructions around. This fixes PR12862. Unfortunately, bugpoint can't create a sane test case for this. Like many other coalescer problems, this failure depends of a very fragile series of events. <rdar://problem/11474428> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157001 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17Fix a verifier bug.Jakob Stoklund Olesen
Make sure useless (def-only) intervals also get verified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157000 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17Relax the requirement that the exception object must be an instruction. DuringBill Wendling
bugpoint-ing, it may turn into something else. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156998 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17[Hexagon] Clean up Hexagon ELF definition.Evandro Menezes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156996 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17enhance the intrinsic info stuff to emit encodings that don't fit in 32-bits ↵Chris Lattner
into a separate side table, using the handy SequenceToOffsetTable class. This encodes all these weird things into another 256 bytes, allowing all intrinsics to be encoded this way. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156995 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17Remove incorrect pattern for ARM SMML instruction.Tim Northover
Patch by Meador Inge. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156989 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17Fix compile error.Manuel Klimek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156986 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17SelectionDAGBuilder: CaseBlock, CaseRanges and CaseCmp changed ↵Stepan Dyatkovskiy
representation of Low and High from signed to unsigned. Since unsigned ints usually simpler, faster and allows to reduce some extra signed bit checks needed before <,>,<=,>= comparisons. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156985 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17Genericize the intrinsics descriptor decoding a bit to make room Chris Lattner
for future expansion, no functionality change yet though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156979 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17finish encoding all of the interesting details of intrinsics. Now intrinsicsChris Lattner
are only rejected because they can't be encoded into a 32-bit unit, not because they contain an unencodable feature. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156978 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17strengthen the intrinsic descriptor stuff to be able to handle sin, cos and ↵Chris Lattner
other intrinsics that use passed-in arguments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156977 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17simplify code generated by tblgen that is not necessary since we droppedChris Lattner
compatibility with LLVM 2.x bitcode files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156976 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17I forgot the #ifdef _MSC_VER guard in my last commit.Francois Pichet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156975 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17Fix the MSVC 2010 build: disable the optimizer for a problematic function.Francois Pichet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156973 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-16Use RegUnits to compute overlapping registers.Jakob Stoklund Olesen
TableGen already computes register units as the basic unit of interference. We can use that to compute the set of overlapping registers. This means that we can easily compute overlap sets for one register at a time. There is no benefit to computing all registers at once. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156960 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-16This patch adds the register class for MIPS16 as well as the ability forAkira Hatanaka
llc to recognize MIPS16 as a MIPS ASE extension. -mips16 will mean the mips16 ASE for mips32 by default. As part of fixing of adding this we discovered some small changes that need to be made to MipsInstrInfo::storeRegToStackSLot and MipsInstrInfo::loadRegFromStackSlot. We were using some "==" equality tests where in fact we should have been using Mips::<regclas>.hasSubClassEQ instead, per suggestion of Jakob Stoklund Olesen. Patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156958 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-16Grammar.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156955 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-16Set sub-register <undef> flags more accurately.Jakob Stoklund Olesen
When widening an existing <def,reads-undef> operand to a super-register, it may be necessary to clear the <undef> flag because the wider register is now read-modify-write through the instruction. Conversely, it may be necessary to add an <undef> flag when the coalescer turns a full-register def into a sub-register def, but the larger register wasn't live before the instruction. This happens in test/CodeGen/ARM/coalesce-subregs.ll, but the test is too small for the <undef> flags to affect the generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156951 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-16Disable JITTest.FunctionIsRecompiledAndRelinked and JITTest.NoStubsSimon Atanasyan
on MIPS where they are not implemented. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156935 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-16Added LLIMCJITMemoryManager to the lli. This manager will be used for MCJIT ↵Danil Malyshev
instead of DefaultJIMMemoryManager. It's more flexible for MCJIT tasks, in addition it's provides a invalidation instruction cache for code sections which will be used before JIT code will be executed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156933 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-16Hexagon: Remove unused command line option.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156917 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-16I noticed that named metadata doesn't provide a direct way of getting at theDuncan Sands
named metadata list, unlike all the other global objects (global variables, functions, aliases), so add that for consistency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156915 91177308-0d34-0410-b5e6-96231b3b80d8
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