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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157357 91177308-0d34-0410-b5e6-96231b3b80d8
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Live ranges with a constrained register class may benefit from splitting
around individual uses. It allows the remaining live range to use a
larger register class where it may allocate. This is like spilling to a
different register class.
This is only attempted on constrained register classes.
<rdar://problem/11438902>
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CHECK. The latter error was hidden by the former, and the test harness
used by e.g. "make check" silently ignored that opt was printing an
error message about an unknown flag instead of running on the test file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157341 91177308-0d34-0410-b5e6-96231b3b80d8
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Now that the coalescer keeps live intervals and machine code in sync at
all times, it needs to deal with identity copies differently.
When merging two virtual registers, all identity copies are removed
right away. This means that other identity copies must come from
somewhere else, and they are going to have a value number.
Deal with such copies by merging the value numbers before erasing the
copy instruction. Otherwise, we leave dangling value numbers in the live
interval.
This fixes PR12927.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157337 91177308-0d34-0410-b5e6-96231b3b80d8
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Patch by Jush Lu <jush.msn@gmail.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157336 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157329 91177308-0d34-0410-b5e6-96231b3b80d8
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Apparently LLVM only stopped emitting this after LLVM 3.0
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inline threshold if the global inline threshold is lower (as for -Oz).
Reviewed by Chandler Carruth and Bill Wendling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157315 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157313 91177308-0d34-0410-b5e6-96231b3b80d8
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case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157309 91177308-0d34-0410-b5e6-96231b3b80d8
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Part of rdar://11496790
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157303 91177308-0d34-0410-b5e6-96231b3b80d8
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teach computeAllocSize about realloc, reallocf, and valloc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157298 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157292 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157274 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157273 91177308-0d34-0410-b5e6-96231b3b80d8
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CodeGenRegisterClass has two constructors. Both need to compute the
TopoSigs BitVector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157271 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157264 91177308-0d34-0410-b5e6-96231b3b80d8
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Fixes PR12898: SCEVExpander crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157263 91177308-0d34-0410-b5e6-96231b3b80d8
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move EmitGEPOffset from InstCombine to Transforms/Utils/Local.h
(a draft of this) patch reviewed by Andrew, thanks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157261 91177308-0d34-0410-b5e6-96231b3b80d8
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objectsize intrinsic.
After a lot of discussion, we realized it's not the best option for run-time bounds checking
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157255 91177308-0d34-0410-b5e6-96231b3b80d8
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Also make sure registers aren't erased twice if the dead def mentions
the register twice.
This fixes PR12911.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157254 91177308-0d34-0410-b5e6-96231b3b80d8
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leader table. That's because it wasn't expecting instructions to turn up as
leader for a value number that is not its own, but equality propagation could
create this situation. One solution is to have the leader table use a WeakVH
but this slows down GVN by about 5%. Instead just have equality propagation not
add instructions to the leader table, only constants and arguments. In theory
this might cause GVN to run more (each time it changes something it runs again)
but it doesn't seem to occur enough to cause a slow down.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157251 91177308-0d34-0410-b5e6-96231b3b80d8
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introduced in r157043. Fixes PR12908.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157236 91177308-0d34-0410-b5e6-96231b3b80d8
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instruction encodings can be excluded during mips16 processing.
This revision fixes the issue raised by Jim Grosbach.
bool hasStandardEncoding() const { return !inMips16Mode(); }
When micromips is added it will be
bool StandardEncoding() const { return !inMips16Mode()&& !inMicroMipsMode(); }
No additional testing is needed other than to assure that there is no regression
from this patch.
Patch by Reed Kotler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157234 91177308-0d34-0410-b5e6-96231b3b80d8
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RHS is positive
based on a patch by Preston Briggs, with some modifications
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157222 91177308-0d34-0410-b5e6-96231b3b80d8
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32-bit offset jump tables just use real branch instructions and so aren't
marked as data regions. We were still emitting the .end_data_region
marker though, which assert()ed.
rdar://11499158
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157221 91177308-0d34-0410-b5e6-96231b3b80d8
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No in-tree targets exercise this path.
Patch by Micah Villmow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157215 91177308-0d34-0410-b5e6-96231b3b80d8
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t2RSB defined the operand correctly, but tRSBS didn't.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157200 91177308-0d34-0410-b5e6-96231b3b80d8
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used.
Patch by Jose Fonseca.
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related changes for Execution and Verifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157183 91177308-0d34-0410-b5e6-96231b3b80d8
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comes from two 128-bit pieces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157175 91177308-0d34-0410-b5e6-96231b3b80d8
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This helps compile time when the greedy register allocator splits live
ranges in giant functions. Without the bias, we would try to grow
regions through the giant edge bundles, usually to find out that the
region became too big and expensive.
If a live range has many uses in blocks near the giant bundle, the small
negative bias doesn't make a big difference, and we still consider
regions including the giant edge bundle.
Giant edge bundles are usually connected to landing pads or indirect
branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157174 91177308-0d34-0410-b5e6-96231b3b80d8
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With physreg joining out of the way, it is easy to recognize the
instructions that need their kill flags cleared while testing for
interference.
This allows us to skip the final scan of all instructions for an 11%
speedup of the coalescer pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157169 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157166 91177308-0d34-0410-b5e6-96231b3b80d8
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It can sometimes be used in addressing modes that don't support %ESP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157165 91177308-0d34-0410-b5e6-96231b3b80d8
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It can be necessary to restrict to a sub-class before accessing
sub-registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157164 91177308-0d34-0410-b5e6-96231b3b80d8
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