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Yes, there are other types than i8* and GEPs on them can produce an add+multiply.
We don't consider that cheap enough to be speculatively executed.
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is possible to do better if the high bit is set in either KnownZero/KnownOne, but
in practice NumSignBits is always 1 when we are zero extending because nothing
is known about that register.
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actually larger.
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D registers since the vpush list may not have gaps. Make sure the stack
adjustment instruction isn't moved between them. Ditto for vpop in
epilogues.
Sorry, can't reduce a small test case.
rdar://9043312
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New live ranges are assigned in long -> short order, but live ranges that have
been evicted at least once are deferred and assigned in short -> long order.
Also disable splitting and spilling for live ranges seen for the first time.
The intention is to create a realistic interference pattern from the heavy live
ranges before starting splitting and spilling around it.
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unconditionally.
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Introduce a variable in the AsmParserExtension whether [] is valid in an
expression. If it is true, parse them like (). Enable this for ELF only.
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6m30.
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Patch by Nathan Jeffords!
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Limit the folding of any_ext and sext into the load operation to scalars.
Limit the active-bits trunc optimization to scalars.
Document vector trunc and vector sext in LangRef.
Similar to commit 126080 (for enabling zext).
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The problem was codegen guessing the wrong values and printing
.section .eh_frame,"aMS",@progbits,4
It is not clear at all if Codegen should try to guess, MC is the
one that should know the default flags.
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hosts. Thanks to Danil Malyshev!
Some tests on Windows use the "not" utility and fail with an error "program not executable". The reason for this error is that the name of the executable file sended to the "not" without the extension.
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understandable (at least I find it easier to understand like this).
No intended functionality change.
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- Don't leak parsed operands during tokenization.
- Don't leak printed insts in llvm-mc.
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registers at phis. This enables us to eliminate a lot of pointless zexts during
the DAGCombine phase. This fixes <rdar://problem/8760114>.
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a block is visited before all of its predecessors.
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and make the actual map private.
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allows for the information propagated across basic blocks to be merged at phis.
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trivial places. This pass needs a lot of work.
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to reduce nesting. This needs to be turned into a table.
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function prototype into a call to a varargs prototype. We do
allow the xform if we have a definition, but otherwise we don't
want to risk that we're changing the abi in a subtle way. On
X86-64, for example, varargs require passing stuff in %al.
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operands starts at index 2, not 1.
rdar://9045024
PR9305
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register.
This avoids some silly stack slot shuffling when both sides of a copy get
spilled.
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DW_LANG_lo_user=0x8000 to DW_LANG_hi_user=0xffff range.
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enabled for all targets. Non-X86 targets should not have this behavior
enabled by default.
Joerg, if you would like to resubmit with the behavior conditionalized to be
X86-ELF only, that's fine.
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Fixes PR9292.
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events on the thread and wait until a resource is ready to event. The vector
of the resource that is ready is returned.
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No code will be inserted after the split point anyway.
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