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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126825 91177308-0d34-0410-b5e6-96231b3b80d8
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- Allow i16, i32, i64, float, and double types, using the native .u16,
.u32, .u64, .f32, and .f64 PTX types.
- Allow loading/storing of all primitive types.
- Allow primitive types to be passed as parameters.
- Allow selection of PTX Version and Shader Model as sub-target attributes.
- Merge integer/floating-point test cases for load/store.
- Use .u32 instead of .s32 to conform to output from NVidia nvcc compiler.
Patch by Justin Holewinski
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Extract the updateSSA() method from the too long extendRange().
LiveOutCache can be shared among all the new intervals since there is at most
one of the new ranges live out from each basic block.
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This fixes PR9259.
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rdar://9002648.
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Simplify the signature - The return value and ParentVNI are no longer needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126806 91177308-0d34-0410-b5e6-96231b3b80d8
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retrieve the underlying getOperandNo() value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126804 91177308-0d34-0410-b5e6-96231b3b80d8
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This method could probably be used by LiveIntervalAnalysis::shrinkToUses, and
now it can use extendIntervalEndTo() which coalesces ranges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126803 91177308-0d34-0410-b5e6-96231b3b80d8
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The value map is currently not used, all values are 'complex mapped' and
LiveIntervalMap::mapValue is used to dig them out.
This is the first step in a series changes leading to the removal of
LiveIntervalMap. Its data structures can be shared among all the live intervals
created by a split, so it is wasteful to create a copy for each.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126800 91177308-0d34-0410-b5e6-96231b3b80d8
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Local live range splitting is better driven by interference. This code was just
guessing.
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This is a waste of time since we already know how to evict all interferences
which is a better approach anyway.
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Patch by Erik Olofsson!
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in that order.
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encode arguments' debug info, in order any way, most of the times. However, if a front end mix-n-matches llvm.dbg.declare and llvm.dbg.value intrinsics to encode debug info for arguments then code generator needs a way to find argument order.
Use 8 bits from line number field to keep track of argument ordering while encoding debug info for an argument. That leaves 24 bit for line no, DebugLoc also allocates 24 bit for line numbers. If a function has more than 255 arguments then rest of the arguments will be ordered by llvm.dbg.* intrinsics' ordering in IR.
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On the first cmake run before the caches has been updated with the
default options, options defined after HandleLLVMOptions are always
treated as off inside HandleLLVMOptions.
Patch by Erik Olofsson!
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which constructs a diagnostic with no line to show.
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a StringRef, for the benefit of clients that want the result as a
nul-terminated string. Clients that expect a StringRef will get one via
the implicit conversion.
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addressing code. On 403.gcc this almost halves CodeGenPrepare time and reduces
total llc time by 9.5%. Unfortunately, getNumUses() is still the hottest function
in llc.
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when revisiting.
This effectively disables the 'turbo' functionality of the greedy register
allocator where all new live ranges created by splitting would be reconsidered
as if they were originals.
There are two reasons for doing this, 1. It guarantees that the algorithm
terminates. Early versions were prone to infinite looping in certain corner
cases. 2. It is a 2x speedup. We can skip a lot of unnecessary interference
checks that won't lead to good splitting anyway.
The problem is that region splitting only gets one shot, so it should probably
be changed to target multiple physical registers at once.
Local live range splitting is still 'turbo' enabled. It only accounts for a
small fraction of compile time, so it is probably not necessary to do anything
about that.
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in alphabetical order.
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intersection of the LHS and RHS ConstantRanges and return "false" when
the range is empty.
This simplifies some code and catches some extra cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126744 91177308-0d34-0410-b5e6-96231b3b80d8
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more work to do here, "icmp ult (urem X, 10), 11" doesn't optimize away yet.
Fixes example 3 from PR9343!
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shift.
16-bit: imm6<5:3> = '001', 8 - <imm> is encded in imm6<2:0>
32-bit: imm6<5:4> = '01',16 - <imm> is encded in imm6<3:0>
64-bit: imm6<5> = '1', 32 - <imm> is encded in imm6<4:0>
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http://llvm.org/bugs/show_bug.cgi?id=8931
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(duplicated) functions to new MCELF class.
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