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These edges are not really necessary, but it is consistent with the
way we currently create physreg edges. Scheduler heuristics that
expect a DAG edge to the block terminator could benefit from this
change. Although in the future I hope we have a better mechanism for
modeling latency across scheduling regions.
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Only record IVUsers that are dominated by simplified loop
headers. Otherwise SCEVExpander will crash while looking for a
preheader.
I previously tried to work around this in LSR itself, but that was
insufficient. This way, LSR can continue to run if some uses are not
in simple loops, as long as we don't attempt to analyze those users.
Fixes <rdar://problem/11049788> Segmentation fault: 11 in LoopStrengthReduce
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the opening parenthese instead of 2 spaces in.
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on our internal nightly testers. So, basically revert r152486 again.
Abbreviated original commit message:
Implement a more intelligent way of spilling uses across an invoke boundary.
It looks as if Chander's inlining work, r152737, exposed an issue.
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same result could be found with VariableInstructions.size(). Also fix some typos in comments.
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checking for or-of-xor operations after those checks; a later check expects that any constant will be in Op1. PR12234.
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rdar://11058464
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rdar://11058464
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Patch by Clemens Hammacher!
Fixes PR12243
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for workaround of g++-4.4's miscompilation.
It caused MSP430DAGToDAGISel::SelectIndexedBinOp() to be miscompiled.
When two ReplaceUses()'s are expanded as inline, vtable in base class is stored to latter (ISelUpdater)ISU.
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the DECL information.
rdar://10855921
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and still allow immediate encoding, just not with cmn.
rdar://11038907
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the test-suite.
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rdar://11038907
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rdar://11056591
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Part of rdar://8905263
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rdar://11056647
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We currently assume that all targets have less than 64k opcodes. We
shouldn't limit it further.
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theoretical fix since it only matters for types with >= 2^63 bits (!) and also
only matters if pointers have more than 64 bits, which is not supported anyway.
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register allocation by allowing all 32 D-registers to be used. Patch by Cameron
Zwarich.
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We cannot limit the concatenated instruction names to 64K. ARM is
already at 32K, and it is easy to imagine a target with more
instructions.
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This patch limited the concatenated register names to 64K which meant
that the total number of registers was many times less than 64K.
If any compilers actually enforce the 64K limit on string literals, and
it turns out to be a problem, we should fix that problem by not using
long string literals.
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Patch by Richard Barton.
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code.
While here, reduce indentation.
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is wasteful.
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This needs a test, but it will take some time to figure
out the best way to get an input that will produce > 2^16 relocs.
Patch by Graydon Hoare!
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add the new node into the work list because there is a potential for further optimizations.
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out the DW_AT_name. Older gdbs unfortunately still use it to
disambiguate member functions in templated classes (gdb.cp/templates.exp).
rdar://11043421 (which is now deferred for a bit)
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unittest/ExecutionEngine/JIT
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Transform:
(fsub x, (fadd x, y)) -> (fneg y) and
(fsub x, (fadd y, x)) -> (fneg y)
if 'unsafe math' is specified.
<rdar://problem/7540295>
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changed since. No one was using it. It is yet another consumer of the
InlineCost interface that I'd like to change.
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essentially sorting the pair's arguments. I'd love to actually call sort
here, but I'm just not that crazy. ;]
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This appears to not be the case with dragonegg at least in some
contexts. Hopefully will fix the bootstrap assert failure there.
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This results in things such as
vmovaps -96(%rbx), %xmm1
vinsertf128 $1, %xmm1, %ymm0, %ymm0
to be combined to
vinsertf128 $1, -96(%rbx), %ymm0, %ymm0
rdar://10643481
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metrics.
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side of things. This is all dead code.
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Fixes PR12202.
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separate file -- we will need the same functionality in ThreadSanitizer
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correlated pairs of pointer arguments at the callsite. This is designed
to recognize the common C++ idiom of begin/end pointer pairs when the
end pointer is a constant offset from the begin pointer. With the
C-based idiom of a pointer and size, the inline cost saw the constant
size calculation, and this provides the same level of information for
begin/end pairs.
In order to propagate this information we have to search for candidate
operations on a pair of pointer function arguments (or derived from
them) which would be simplified if the pointers had a known constant
offset. Then the callsite analysis looks for such pointer pairs in the
argument list, and applies the appropriate bonus.
This helps LLVM detect that half of bounds-checked STL algorithms
(such as hash_combine_range, and some hybrid sort implementations)
disappear when inlined with a constant size input. However, it's not
a complete fix due the inaccuracy of our cost metric for constants in
general. I'm looking into that next.
Benchmarks showed no significant code size change, and very minor
performance changes. However, specific code such as hashing is showing
significantly cleaner inlining decisions.
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should be ignored by ARC optimization, don't insert new ARC runtime
calls in the unwind destination.
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Commit r152704 exposed a latent MSVC limitation (aka bug).
Both ilist and and iplist contains the same function:
template<class InIt> void insert(iterator where, InIt first, InIt last) {
for (; first != last; ++first) insert(where, *first);
}
Also ilist inherits from iplist and ilist contains a "using iplist<NodeTy>::insert".
MSVC doesn't know which one to pick and complain with an error.
I think it is safe to delete ilist::insert since it is redundant anyway.
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