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2012-09-05MCJIT: Add faux remote target execution to lli for the MCJIT.Jim Grosbach
Simulate a remote target address space by allocating a seperate chunk of memory for the target and re-mapping section addresses to that prior to execution. Later we'll want to have a truly remote process, but for now this gets us closer to being able to test the remote target functionality outside LLDB. rdar://12157052 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163216 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05Switch BasicAliasAnalysis' cache to SmallDenseMap.Benjamin Kramer
It relies on clear() being fast and the cache rarely has more than 1 or 2 elements, so give it an inline capacity and always shrink it back down in case it grows. DenseMap will grow to 64 buckets which makes clear() a lot slower. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163215 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access thePranav Bhandarkar
subreg_hireg of register pair Rp. * lib/Target/Hexagon/HexagonPeephole.cpp(PeepholeDoubleRegsMap): New DenseMap similar to PeepholeMap that additionally records subreg info too. (runOnMachineFunction): Record information in PeepholeDoubleRegsMap and copy propagate the high sub-reg of Rp0 in Rp1 = lsr(Rp0, #32) to the instruction Rx = COPY Rp1:logreg_subreg. * test/CodeGen/Hexagon/remove_lsr.ll: New test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163214 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05[asan] fix lintKostya Serebryany
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163205 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05Fixed the DAG combiner to better handle the folding of AND nodes for vector ↵Silviu Baranga
types. The previous code was making the assumption that the length of the bitmask returned by isConstantSplat was equal to the size of the vector type. Now we first make sure that the splat value has at least the length of the vector lane type, then we only use as many fields as we have available in the splat value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163203 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05[asan] extend the blacklist functionality to handle global-init. Patch by ↵Kostya Serebryany
Reid Watson git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163199 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05Remove some of the patterns added in r163196. Increasing the complexity on ↵Craig Topper
insert_subvector into undef accomplishes the same thing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163198 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05Add patterns for integer forms of VINSERTF128/VINSERTI128 folded with loads. ↵Craig Topper
Also add patterns to turn subvector inserts with loads to index 0 of an undef into VMOVAPS. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163196 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05Add a FIXME that assumes we maintain backward compatibility until the next ↵Chad Rosier
major release. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163195 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05Reorder the comments of EmitExceptionTable.Logan Chien
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163194 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05Fix UseInitArray option for MIPS target.Logan Chien
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163193 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05Convert vextracti128/vextractf128 intrinsics to extract_subvector at DAG ↵Craig Topper
build time. Similar was previously done for vinserti128/vinsertf128. Add patterns for folding these extract_subvectors with stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163192 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05Removed Trie.h; unused in a long timeMarshall Clow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163191 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05Remove redundant semicolons to fix -pedantic-errors build.Richard Smith
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163190 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05Fix function name per coding standard.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163187 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05Fix function name per coding standard.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163186 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05[ms-inline asm] Add support for the nsdialect keyword in the BitcodeChad Rosier
Reader/Writer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163185 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05[ms-inline asm] Add the nsdialect keyword to the lexer.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163184 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05[ms-inline asm] Emit the (new) inline asm Non-Standard Dialect attribute.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163181 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04Make provenance checking conservative in cases whenDan Gohman
pointers-to-strong-pointers may be in play. These can lead to retains and releases happening in unstructured ways, foiling the optimizer. This fixes rdar://12150909. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163180 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04BypassSlowDivision: Assign to reference, don't copy the object.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163179 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04Search the whole instruction for tied operands.Jakob Stoklund Olesen
Implicit uses can be dynamically tied to defs. This will soon be used for predicated instructions on ARM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163177 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04[ms-inline asm] Add the inline assembly dialect, AsmDialect, to the InlineAsmChad Rosier
class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163175 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04[ms-inline asm] Remove the Inline Asm Non-Standard Dialect attribute. ThisChad Rosier
implementation does not co-exist well with how the sideeffect and alignstack attributes are handled. The reverts r161641. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163174 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04[LIT] Add a clang_tools_extra_site_cfg to match the various other site_cfg.David Blaikie
This doesn't seem ideal, perhaps we could just keep the llvm_site_cfg and have other config (clang and clang-tools-extra) derive their site_cfg from that. Suggestions/complaints/ideas welcome. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163171 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04Fix my previous patch (r163164). It does now what it is supposed to do:Jakub Staszak
Doesn't set MadeChange to TRUE if BypassSlowDivision doesn't change anything. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163165 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04Return false if BypassSlowDivision doesn't change anything.Jakub Staszak
Also a few minor changes: - use pre-inc instead of post-inc - use isa instead of dyn_cast - 80 col - trailing spaces git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163164 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04Remove unneeded code.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163160 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04Typo.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163154 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04Actually use the MachineOperand field for isRegTiedToDefOperand().Jakob Stoklund Olesen
The MachineOperand::TiedTo field was maintained, but not used. This patch enables it in isRegTiedToDefOperand() and isRegTiedToUseOperand() which are the actual functions use by the register allocator. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163153 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04Move tie checks into MachineVerifier::visitMachineOperand.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163152 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04Allow tied uses and defs in different orders.Jakob Stoklund Olesen
After much agonizing, use a full 4 bits of precious MachineOperand space to encode this. This uses existing padding, and doesn't grow MachineOperand beyond its current 32 bytes. This allows tied defs among the first 15 operands on a normal instruction, just like the current MCInstrDesc constraint encoding. Inline assembly needs to be able to tie more than the first 15 operands, and gets special treatment. Tied uses can appear beyond 15 operands, as long as they are tied to a def that's in range. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163151 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04Generic Bypass Slow DivPreston Gurd
- CodeGenPrepare pass for identifying div/rem ops - Backend specifies the type mapping using addBypassSlowDivType - Enabled only for Intel Atom with O2 32-bit -> 8-bit - Replace IDIV with instructions which test its value and use DIVB if the value is positive and less than 256. - In the case when the quotient and remainder of a divide are used a DIV and a REM instruction will be present in the IR. In the non-Atom case they are both lowered to IDIVs and CSE removes the redundant IDIV instruction, using the quotient and remainder from the first IDIV. However, due to this optimization CSE is not able to eliminate redundant IDIV instructions because they are located in different basic blocks. This is overcome by calculating both the quotient (DIV) and remainder (REM) in each basic block that is inserted by the optimization and reusing the result values when a subsequent DIV or REM instruction uses the same operands. - Test cases check for the presents of the optimization when calculating either the quotient, remainder, or both. Patch by Tyler Nowicki! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163150 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04Make sure macros in the include subdirectory are not used without being defined.Bob Wilson
Rationale: For each preprocessor macro, either the definedness is what's meaningful, or the value is what's meaningful, or both. If definedness is meaningful, we should use #ifdef. If the value is meaningful, we should use and #ifdef interchangeably for the same macro, seems ugly to me, even if undefined macros are zero if used. This also has the benefit that including an LLVM header doesn't prevent you from compiling with -Wundef -Werror. Patch by John Garvin! <rdar://problem/12189979> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163148 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04Porting Hexagon MI Scheduler to the new API.Sergei Larin
Change current Hexagon MI scheduler to use new converging scheduler. Integrates DFA resource model into it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163137 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04Patch to implement UMLAL/SMLAL instructions for the ARM architectureArnold Schwaighofer
This patch corrects the definition of umlal/smlal instructions and adds support for matching them to the ARM dag combiner. Bug 12213 Patch by Yin Ma! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163136 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04This patch optimizes shuffle instruction - generates 2 instructions instead ↵Elena Demikhovsky
of 4. Since this specific shuffle is widely used in many workloads we have ~10% performance on them. shufflevector <8 x float> %A, <8 x float> %B, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> vmovaps (%rdx), %ymm0 vshufps $8, %ymm0, %ymm0, %ymm0 vmovaps (%rcx), %ymm1 vshufps $8, %ymm0, %ymm1, %ymm1 vunpcklps %ymm0, %ymm1, %ymm0 vmovaps (%rcx), %ymm0 vmovsldup (%rdx), %ymm1 vblendps $85, %ymm0, %ymm1, %ymm0 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163134 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04LICM may hoist an instruction with undefined behavior above a trap.Nadav Rotem
Scan the body of the loop and find instructions that may trap. Use this information when deciding if it is safe to hoist or sink instructions. Notice that we can optimize the search of instructions that may throw in the case of nested loops. rdar://11518836 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163132 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04Fix Android build of gtest and lib/Support.Evgeniy Stepanov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04Add support for fetching inlining context (stack of source code locations)Alexey Samsonov
by instruction address from DWARF. Add --inlining flag to llvm-dwarfdump to demonstrate and test this functionality, so that "llvm-dwarfdump --inlining --address=0x..." now works much like "addr2line -i 0x...", provided that the binary has debug info (Clang's -gline-tables-only *is* enough). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163128 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04Be conservative about allocations that may alias the accessed pointer.Bob Wilson
If an allocation has a must-alias relation to the access pointer, we treat it as a Def. Otherwise, without this check, the code here was just skipping over the allocation call and ignoring it. I noticed this by inspection and don't have a specific testcase that it breaks, but it seems like we need to treat a may-alias allocation as a Clobber. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163127 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03[ms-inline asm] Make comment more verbose and add an assert.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163125 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03[ms-inline asm] Asm operands can map to one or more MCOperands. Therefore, addChad Rosier
the NumMCOperands argument to the GetMCInstOperandNum() function that is set to the number of MCOperands this asm operand mapped to. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03[ms-inline asm] Add a comment.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163123 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03[ms-inline asm] Add an interface to the GetMCInstOperandNum() function in theChad Rosier
MCTargetAsmParser class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163122 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03Remove extraneous return.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163119 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03[ms-inline asm] Return the MCOperandNum instead of passing a reference.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163118 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03Remove always true checks. Noticed by Adhemerval Zanella.Roman Divacky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163117 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03Add braces to the case statement.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163116 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03IRBuilderify the SjlLjEHPrepare pass.Benjamin Kramer
No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163115 91177308-0d34-0410-b5e6-96231b3b80d8
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