diff options
Diffstat (limited to 'utils/TableGen')
| -rw-r--r-- | utils/TableGen/CodeEmitterGen.cpp | 9 | ||||
| -rw-r--r-- | utils/TableGen/CodeGenTarget.cpp | 9 | ||||
| -rw-r--r-- | utils/TableGen/InstrInfoEmitter.cpp | 3 |
3 files changed, 16 insertions, 5 deletions
diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp index bebf1fd56b..a21a31c2bf 100644 --- a/utils/TableGen/CodeEmitterGen.cpp +++ b/utils/TableGen/CodeEmitterGen.cpp @@ -30,7 +30,8 @@ void CodeEmitterGen::reverseBits(std::vector<Record*> &Insts) { R->getName() == "DECLARE" || R->getName() == "EXTRACT_SUBREG" || R->getName() == "INSERT_SUBREG" || - R->getName() == "IMPLICIT_DEF") continue; + R->getName() == "IMPLICIT_DEF" || + R->getName() == "SUBREG_TO_REG") continue; BitsInit *BI = R->getValueAsBitsInit("Inst"); @@ -105,7 +106,8 @@ void CodeEmitterGen::run(std::ostream &o) { R->getName() == "DECLARE" || R->getName() == "EXTRACT_SUBREG" || R->getName() == "INSERT_SUBREG" || - R->getName() == "IMPLICIT_DEF") { + R->getName() == "IMPLICIT_DEF" || + R->getName() == "SUBREG_TO_REG") { o << " 0U"; continue; } @@ -139,7 +141,8 @@ void CodeEmitterGen::run(std::ostream &o) { InstName == "DECLARE"|| InstName == "EXTRACT_SUBREG" || InstName == "INSERT_SUBREG" || - InstName == "IMPLICIT_DEF") continue; + InstName == "IMPLICIT_DEF" || + InstName == "SUBREG_TO_REG") continue; BitsInit *BI = R->getValueAsBitsInit("Inst"); const std::vector<RecordVal> &Vals = R->getValues(); diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index e41f75a68a..da34ebf38e 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -309,6 +309,11 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*> throw "Could not find 'IMPLICIT_DEF' instruction!"; const CodeGenInstruction *IMPLICIT_DEF = &I->second; + I = getInstructions().find("SUBREG_TO_REG"); + if (I == Instructions.end()) + throw "Could not find 'SUBREG_TO_REG' instruction!"; + const CodeGenInstruction *SUBREG_TO_REG = &I->second; + // Print out the rest of the instructions now. NumberedInstructions.push_back(PHI); NumberedInstructions.push_back(INLINEASM); @@ -317,6 +322,7 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*> NumberedInstructions.push_back(EXTRACT_SUBREG); NumberedInstructions.push_back(INSERT_SUBREG); NumberedInstructions.push_back(IMPLICIT_DEF); + NumberedInstructions.push_back(SUBREG_TO_REG); for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II) if (&II->second != PHI && &II->second != INLINEASM && @@ -324,7 +330,8 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*> &II->second != DECLARE && &II->second != EXTRACT_SUBREG && &II->second != INSERT_SUBREG && - &II->second != IMPLICIT_DEF) + &II->second != IMPLICIT_DEF && + &II->second != SUBREG_TO_REG) NumberedInstructions.push_back(&II->second); } diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp index d765152d23..cc03c6aab7 100644 --- a/utils/TableGen/InstrInfoEmitter.cpp +++ b/utils/TableGen/InstrInfoEmitter.cpp @@ -411,7 +411,8 @@ void InstrInfoEmitter::emitShiftedValue(Record *R, StringInit *Val, R->getName() != "DECLARE" && R->getName() != "EXTRACT_SUBREG" && R->getName() != "INSERT_SUBREG" && - R->getName() != "IMPLICIT_DEF") + R->getName() != "IMPLICIT_DEF" && + R->getName() != "SUBREG_TO_REG") throw R->getName() + " doesn't have a field named '" + Val->getValue() + "'!"; return; |