aboutsummaryrefslogtreecommitdiff
path: root/test/CodeGen/SystemZ/addr-01.ll
diff options
context:
space:
mode:
Diffstat (limited to 'test/CodeGen/SystemZ/addr-01.ll')
-rw-r--r--test/CodeGen/SystemZ/addr-01.ll107
1 files changed, 107 insertions, 0 deletions
diff --git a/test/CodeGen/SystemZ/addr-01.ll b/test/CodeGen/SystemZ/addr-01.ll
new file mode 100644
index 0000000000..c125ffa71a
--- /dev/null
+++ b/test/CodeGen/SystemZ/addr-01.ll
@@ -0,0 +1,107 @@
+; Test selection of addresses with indices in cases where the address
+; is used once.
+;
+; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+
+; A simple index address.
+define void @f1(i64 %addr, i64 %index) {
+; CHECK: f1:
+; CHECK: lb %r0, 0(%r3,%r2)
+; CHECK: br %r14
+ %add = add i64 %addr, %index
+ %ptr = inttoptr i64 %add to i8 *
+ %a = load volatile i8 *%ptr
+ ret void
+}
+
+; An address with an index and a displacement (order 1).
+define void @f2(i64 %addr, i64 %index) {
+; CHECK: f2:
+; CHECK: lb %r0, 100(%r3,%r2)
+; CHECK: br %r14
+ %add1 = add i64 %addr, %index
+ %add2 = add i64 %add1, 100
+ %ptr = inttoptr i64 %add2 to i8 *
+ %a = load volatile i8 *%ptr
+ ret void
+}
+
+; An address with an index and a displacement (order 2).
+define void @f3(i64 %addr, i64 %index) {
+; CHECK: f3:
+; CHECK: lb %r0, 100(%r3,%r2)
+; CHECK: br %r14
+ %add1 = add i64 %addr, 100
+ %add2 = add i64 %add1, %index
+ %ptr = inttoptr i64 %add2 to i8 *
+ %a = load volatile i8 *%ptr
+ ret void
+}
+
+; An address with an index and a subtracted displacement (order 1).
+define void @f4(i64 %addr, i64 %index) {
+; CHECK: f4:
+; CHECK: lb %r0, -100(%r3,%r2)
+; CHECK: br %r14
+ %add1 = add i64 %addr, %index
+ %add2 = sub i64 %add1, 100
+ %ptr = inttoptr i64 %add2 to i8 *
+ %a = load volatile i8 *%ptr
+ ret void
+}
+
+; An address with an index and a subtracted displacement (order 2).
+define void @f5(i64 %addr, i64 %index) {
+; CHECK: f5:
+; CHECK: lb %r0, -100(%r3,%r2)
+; CHECK: br %r14
+ %add1 = sub i64 %addr, 100
+ %add2 = add i64 %add1, %index
+ %ptr = inttoptr i64 %add2 to i8 *
+ %a = load volatile i8 *%ptr
+ ret void
+}
+
+; An address with an index and a displacement added using OR.
+define void @f6(i64 %addr, i64 %index) {
+; CHECK: f6:
+; CHECK: nill %r2, 65528
+; CHECK: lb %r0, 6(%r3,%r2)
+; CHECK: br %r14
+ %aligned = and i64 %addr, -8
+ %or = or i64 %aligned, 6
+ %add = add i64 %or, %index
+ %ptr = inttoptr i64 %add to i8 *
+ %a = load volatile i8 *%ptr
+ ret void
+}
+
+; Like f6, but without the masking. This OR doesn't count as a displacement.
+define void @f7(i64 %addr, i64 %index) {
+; CHECK: f7:
+; CHECK: oill %r2, 6
+; CHECK: lb %r0, 0(%r3,%r2)
+; CHECK: br %r14
+ %or = or i64 %addr, 6
+ %add = add i64 %or, %index
+ %ptr = inttoptr i64 %add to i8 *
+ %a = load volatile i8 *%ptr
+ ret void
+}
+
+; Like f6, but with the OR applied after the index. We don't know anything
+; about the alignment of %add here.
+define void @f8(i64 %addr, i64 %index) {
+; CHECK: f8:
+; CHECK: nill %r2, 65528
+; CHECK: agr %r2, %r3
+; CHECK: oill %r2, 6
+; CHECK: lb %r0, 0(%r2)
+; CHECK: br %r14
+ %aligned = and i64 %addr, -8
+ %add = add i64 %aligned, %index
+ %or = or i64 %add, 6
+ %ptr = inttoptr i64 %or to i8 *
+ %a = load volatile i8 *%ptr
+ ret void
+}