diff options
Diffstat (limited to 'lib')
30 files changed, 118 insertions, 76 deletions
diff --git a/lib/MC/MCSubtargetInfo.cpp b/lib/MC/MCSubtargetInfo.cpp index 1874bf03bd..3bb20b07f3 100644 --- a/lib/MC/MCSubtargetInfo.cpp +++ b/lib/MC/MCSubtargetInfo.cpp @@ -16,6 +16,38 @@ using namespace llvm; +void MCSubtargetInfo::InitMCSubtargetInfo(StringRef CPU, StringRef FS, + const SubtargetFeatureKV *PF, + const SubtargetFeatureKV *PD, + const SubtargetInfoKV *PI, + const InstrStage *IS, + const unsigned *OC, + const unsigned *FP, + unsigned NF, unsigned NP) { + ProcFeatures = PF; + ProcDesc = PD; + ProcItins = PI; + Stages = IS; + OperandCycles = OC; + ForwardingPathes = FP; + NumFeatures = NF; + NumProcs = NP; + + SubtargetFeatures Features(FS); + FeatureBits = Features.getFeatureBits(CPU, ProcDesc, NumProcs, + ProcFeatures, NumFeatures); +} + + +/// ReInitMCSubtargetInfo - Change CPU (and optionally supplemented with +/// feature string) and recompute feature bits. +uint64_t MCSubtargetInfo::ReInitMCSubtargetInfo(StringRef CPU, StringRef FS) { + SubtargetFeatures Features(FS); + FeatureBits = Features.getFeatureBits(CPU, ProcDesc, NumProcs, + ProcFeatures, NumFeatures); + return FeatureBits; +} + InstrItineraryData MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const { assert(ProcItins && "Instruction itineraries information not available!"); @@ -42,11 +74,3 @@ MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const { return InstrItineraryData(Stages, OperandCycles, ForwardingPathes, (InstrItinerary *)Found->Value); } - -/// getFeatureBits - Get the feature bits for a CPU (optionally supplemented -/// with feature string). -uint64_t MCSubtargetInfo::getFeatureBits(StringRef CPU, StringRef FS) const { - SubtargetFeatures Features(FS); - return Features.getFeatureBits(CPU, ProcDesc, NumProcs, - ProcFeatures, NumFeatures); -} diff --git a/lib/MC/SubtargetFeature.cpp b/lib/MC/SubtargetFeature.cpp index b9caece474..951e0aa5b6 100644 --- a/lib/MC/SubtargetFeature.cpp +++ b/lib/MC/SubtargetFeature.cpp @@ -231,8 +231,9 @@ uint64_t SubtargetFeatures::getFeatureBits(const StringRef CPU, size_t CPUTableSize, const SubtargetFeatureKV *FeatureTable, size_t FeatureTableSize) { - assert(CPUTable && "missing CPU table"); - assert(FeatureTable && "missing features table"); + if (!FeatureTableSize || !CPUTableSize) + return 0; + #ifndef NDEBUG for (size_t i = 1; i < CPUTableSize; i++) { assert(strcmp(CPUTable[i - 1].Key, CPUTable[i].Key) < 0 && @@ -249,24 +250,27 @@ uint64_t SubtargetFeatures::getFeatureBits(const StringRef CPU, if (CPU == "help") Help(CPUTable, CPUTableSize, FeatureTable, FeatureTableSize); - // Find CPU entry - const SubtargetFeatureKV *CPUEntry = Find(CPU, CPUTable, CPUTableSize); - // If there is a match - if (CPUEntry) { - // Set base feature bits - Bits = CPUEntry->Value; - - // Set the feature implied by this CPU feature, if any. - for (size_t i = 0; i < FeatureTableSize; ++i) { - const SubtargetFeatureKV &FE = FeatureTable[i]; - if (CPUEntry->Value & FE.Value) - SetImpliedBits(Bits, &FE, FeatureTable, FeatureTableSize); + // Find CPU entry if CPU name is specified. + if (!CPU.empty()) { + const SubtargetFeatureKV *CPUEntry = Find(CPU, CPUTable, CPUTableSize); + // If there is a match + if (CPUEntry) { + // Set base feature bits + Bits = CPUEntry->Value; + + // Set the feature implied by this CPU feature, if any. + for (size_t i = 0; i < FeatureTableSize; ++i) { + const SubtargetFeatureKV &FE = FeatureTable[i]; + if (CPUEntry->Value & FE.Value) + SetImpliedBits(Bits, &FE, FeatureTable, FeatureTableSize); + } + } else { + errs() << "'" << CPU + << "' is not a recognized processor for this target" + << " (ignoring processor)\n"; } - } else { - errs() << "'" << CPU - << "' is not a recognized processor for this target" - << " (ignoring processor)\n"; } + // Iterate through each feature for (size_t i = 0, E = Features.size(); i < E; i++) { const StringRef Feature = Features[i]; diff --git a/lib/Target/ARM/ARMSubtarget.cpp b/lib/Target/ARM/ARMSubtarget.cpp index 4affc15715..12f12ad862 100644 --- a/lib/Target/ARM/ARMSubtarget.cpp +++ b/lib/Target/ARM/ARMSubtarget.cpp @@ -38,7 +38,7 @@ StrictAlign("arm-strict-align", cl::Hidden, ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS) - : ARMGenSubtargetInfo() + : ARMGenSubtargetInfo(TT, CPU, FS) , ARMProcFamily(Others) , HasV4TOps(false) , HasV5TOps(false) @@ -78,9 +78,6 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU, if (CPUString.empty()) CPUString = "generic"; - if (TT.find("eabi") != std::string::npos) - TargetABI = ARM_ABI_AAPCS; - // Insert the architecture feature derived from the target triple into the // feature string. This is important for setting features that are implied // based on the architecture version. @@ -92,7 +89,7 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU, ArchFS = FS; } - ParseSubtargetFeatures(ArchFS, CPUString); + ParseSubtargetFeatures(CPUString, ArchFS); // Thumb2 implies at least V6T2. FIXME: Fix tests to explicitly specify a // ARM version or CPU and then remove this. @@ -105,6 +102,9 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU, // After parsing Itineraries, set ItinData.IssueWidth. computeIssueWidth(); + if (TT.find("eabi") != std::string::npos) + TargetABI = ARM_ABI_AAPCS; + if (isAAPCS_ABI()) stackAlignment = 8; diff --git a/lib/Target/ARM/ARMSubtarget.h b/lib/Target/ARM/ARMSubtarget.h index 5fad9a777d..a199f2bfe3 100644 --- a/lib/Target/ARM/ARMSubtarget.h +++ b/lib/Target/ARM/ARMSubtarget.h @@ -25,6 +25,7 @@ namespace llvm { class GlobalValue; +class StringRef; class ARMSubtarget : public ARMGenSubtargetInfo { protected: @@ -168,7 +169,7 @@ protected: } /// ParseSubtargetFeatures - Parses features string setting specified /// subtarget options. Definition of function is auto generated by tblgen. - void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU); + void ParseSubtargetFeatures(StringRef CPU, StringRef FS); void computeIssueWidth(); diff --git a/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp b/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp index 2d5c219ae4..402ab4e46b 100644 --- a/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp +++ b/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp @@ -40,9 +40,10 @@ MCRegisterInfo *createARMMCRegisterInfo() { return X; } -MCSubtargetInfo *createARMMCSubtargetInfo() { +MCSubtargetInfo *createARMMCSubtargetInfo(StringRef TT, StringRef CPU, + StringRef FS) { MCSubtargetInfo *X = new MCSubtargetInfo(); - InitARMMCSubtargetInfo(X); + InitARMMCSubtargetInfo(X, CPU, FS); return X; } diff --git a/lib/Target/Alpha/AlphaSubtarget.cpp b/lib/Target/Alpha/AlphaSubtarget.cpp index fce65fc570..000f606aca 100644 --- a/lib/Target/Alpha/AlphaSubtarget.cpp +++ b/lib/Target/Alpha/AlphaSubtarget.cpp @@ -23,13 +23,13 @@ using namespace llvm; AlphaSubtarget::AlphaSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS) - : AlphaGenSubtargetInfo(), HasCT(false) { + : AlphaGenSubtargetInfo(TT, CPU, FS), HasCT(false) { std::string CPUName = CPU; if (CPUName.empty()) CPUName = "generic"; // Parse features string. - ParseSubtargetFeatures(FS, CPUName); + ParseSubtargetFeatures(CPUName, FS); // Initialize scheduling itinerary for the specified CPU. InstrItins = getInstrItineraryForCPU(CPUName); diff --git a/lib/Target/Alpha/AlphaSubtarget.h b/lib/Target/Alpha/AlphaSubtarget.h index 847d4956e1..70b311683f 100644 --- a/lib/Target/Alpha/AlphaSubtarget.h +++ b/lib/Target/Alpha/AlphaSubtarget.h @@ -22,6 +22,7 @@ #include "AlphaGenSubtargetInfo.inc" namespace llvm { +class StringRe; class AlphaSubtarget : public AlphaGenSubtargetInfo { protected: @@ -39,7 +40,7 @@ public: /// ParseSubtargetFeatures - Parses features string setting specified /// subtarget options. Definition of function is auto generated by tblgen. - void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU); + void ParseSubtargetFeatures(StringRef CPU, StringRef FS); bool hasCT() const { return HasCT; } }; diff --git a/lib/Target/Blackfin/BlackfinSubtarget.cpp b/lib/Target/Blackfin/BlackfinSubtarget.cpp index 9d1d4816d3..696bb87759 100644 --- a/lib/Target/Blackfin/BlackfinSubtarget.cpp +++ b/lib/Target/Blackfin/BlackfinSubtarget.cpp @@ -23,7 +23,7 @@ using namespace llvm; BlackfinSubtarget::BlackfinSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS) - : BlackfinGenSubtargetInfo(), sdram(false), + : BlackfinGenSubtargetInfo(TT, CPU, FS), sdram(false), icplb(false), wa_mi_shift(false), wa_csync(false), @@ -39,5 +39,5 @@ BlackfinSubtarget::BlackfinSubtarget(const std::string &TT, if (CPUName.empty()) CPUName = "generic"; // Parse features string. - ParseSubtargetFeatures(FS, CPUName); + ParseSubtargetFeatures(CPUName, FS); } diff --git a/lib/Target/Blackfin/BlackfinSubtarget.h b/lib/Target/Blackfin/BlackfinSubtarget.h index a7d6c16261..1a01a81116 100644 --- a/lib/Target/Blackfin/BlackfinSubtarget.h +++ b/lib/Target/Blackfin/BlackfinSubtarget.h @@ -21,6 +21,7 @@ #include "BlackfinGenSubtargetInfo.inc" namespace llvm { +class StringRef; class BlackfinSubtarget : public BlackfinGenSubtargetInfo { bool sdram; @@ -40,8 +41,7 @@ namespace llvm { /// ParseSubtargetFeatures - Parses features string setting specified /// subtarget options. Definition of function is auto generated by tblgen. - void ParseSubtargetFeatures(const std::string &FS, - const std::string &CPU); + void ParseSubtargetFeatures(StringRef CPU, StringRef FS); }; } // end namespace llvm diff --git a/lib/Target/CellSPU/SPUSubtarget.cpp b/lib/Target/CellSPU/SPUSubtarget.cpp index 2481e3b9fc..cb94d281c6 100644 --- a/lib/Target/CellSPU/SPUSubtarget.cpp +++ b/lib/Target/CellSPU/SPUSubtarget.cpp @@ -25,7 +25,7 @@ using namespace llvm; SPUSubtarget::SPUSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS) : - SPUGenSubtargetInfo(), + SPUGenSubtargetInfo(TT, CPU, FS), StackAlignment(16), ProcDirective(SPU::DEFAULT_PROC), UseLargeMem(false) @@ -35,7 +35,7 @@ SPUSubtarget::SPUSubtarget(const std::string &TT, const std::string &CPU, std::string default_cpu("v0"); // Parse features string. - ParseSubtargetFeatures(FS, default_cpu); + ParseSubtargetFeatures(default_cpu, FS); // Initialize scheduling itinerary for the specified CPU. InstrItins = getInstrItineraryForCPU(default_cpu); diff --git a/lib/Target/CellSPU/SPUSubtarget.h b/lib/Target/CellSPU/SPUSubtarget.h index 19b97d3a0c..7c4aa14302 100644 --- a/lib/Target/CellSPU/SPUSubtarget.h +++ b/lib/Target/CellSPU/SPUSubtarget.h @@ -23,6 +23,7 @@ namespace llvm { class GlobalValue; + class StringRef; namespace SPU { enum { @@ -57,7 +58,7 @@ namespace llvm { /// ParseSubtargetFeatures - Parses features string setting specified /// subtarget options. Definition of function is auto generated by tblgen. - void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU); + void ParseSubtargetFeatures(StringRef CPU, StringRef FS); /// SetJITMode - This is called to inform the subtarget info that we are /// producing code for the JIT. diff --git a/lib/Target/MBlaze/MBlazeSubtarget.cpp b/lib/Target/MBlaze/MBlazeSubtarget.cpp index 81578ce07a..8e706cd4c7 100644 --- a/lib/Target/MBlaze/MBlazeSubtarget.cpp +++ b/lib/Target/MBlaze/MBlazeSubtarget.cpp @@ -26,7 +26,7 @@ using namespace llvm; MBlazeSubtarget::MBlazeSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS): - MBlazeGenSubtargetInfo(), + MBlazeGenSubtargetInfo(TT, CPU, FS), HasBarrel(false), HasDiv(false), HasMul(false), HasPatCmp(false), HasFPU(false), HasMul64(false), HasSqrt(false) { @@ -34,7 +34,7 @@ MBlazeSubtarget::MBlazeSubtarget(const std::string &TT, std::string CPUName = CPU; if (CPUName.empty()) CPUName = "mblaze"; - ParseSubtargetFeatures(FS, CPUName); + ParseSubtargetFeatures(CPUName, FS); // Only use instruction scheduling if the selected CPU has an instruction // itinerary (the default CPU is the only one that doesn't). diff --git a/lib/Target/MBlaze/MBlazeSubtarget.h b/lib/Target/MBlaze/MBlazeSubtarget.h index 7d70040423..43b0197ad5 100644 --- a/lib/Target/MBlaze/MBlazeSubtarget.h +++ b/lib/Target/MBlaze/MBlazeSubtarget.h @@ -22,6 +22,7 @@ #include "MBlazeGenSubtargetInfo.inc" namespace llvm { +class StringRef; class MBlazeSubtarget : public MBlazeGenSubtargetInfo { @@ -46,7 +47,7 @@ public: /// ParseSubtargetFeatures - Parses features string setting specified /// subtarget options. Definition of function is auto generated by tblgen. - void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU); + void ParseSubtargetFeatures(StringRef CPU, StringRef FS); /// Compute the number of maximum number of issues per cycle for the /// MBlaze scheduling itineraries. diff --git a/lib/Target/MSP430/MSP430Subtarget.cpp b/lib/Target/MSP430/MSP430Subtarget.cpp index bd8d7cda37..42cc882295 100644 --- a/lib/Target/MSP430/MSP430Subtarget.cpp +++ b/lib/Target/MSP430/MSP430Subtarget.cpp @@ -22,10 +22,11 @@ using namespace llvm; MSP430Subtarget::MSP430Subtarget(const std::string &TT, - const std::string &CPUIgnored, - const std::string &FS) { - std::string CPU = "generic"; + const std::string &CPU, + const std::string &FS) : + MSP430GenSubtargetInfo(TT, CPU, FS) { + std::string CPUName = "generic"; // Parse features string. - ParseSubtargetFeatures(FS, CPU); + ParseSubtargetFeatures(CPUName, FS); } diff --git a/lib/Target/MSP430/MSP430Subtarget.h b/lib/Target/MSP430/MSP430Subtarget.h index ead213bcae..1ce5f11fe1 100644 --- a/lib/Target/MSP430/MSP430Subtarget.h +++ b/lib/Target/MSP430/MSP430Subtarget.h @@ -22,6 +22,7 @@ #include <string> namespace llvm { +class StringRef; class MSP430Subtarget : public MSP430GenSubtargetInfo { bool ExtendedInsts; @@ -34,7 +35,7 @@ public: /// ParseSubtargetFeatures - Parses features string setting specified /// subtarget options. Definition of function is auto generated by tblgen. - void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU); + void ParseSubtargetFeatures(StringRef CPU, StringRef FS); }; } // End llvm namespace diff --git a/lib/Target/Mips/MipsSubtarget.cpp b/lib/Target/Mips/MipsSubtarget.cpp index a96f872b7c..7a5d417ce6 100644 --- a/lib/Target/Mips/MipsSubtarget.cpp +++ b/lib/Target/Mips/MipsSubtarget.cpp @@ -23,7 +23,7 @@ using namespace llvm; MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool little) : - MipsGenSubtargetInfo(), + MipsGenSubtargetInfo(TT, CPU, FS), MipsArchVersion(Mips1), MipsABI(O32), IsLittle(little), IsSingleFloat(false), IsFP64bit(false), IsGP64bit(false), HasVFPU(false), IsLinux(true), HasSEInReg(false), HasCondMov(false), HasMulDivAdd(false), HasMinMax(false), @@ -35,7 +35,7 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, MipsArchVersion = Mips1; // Parse features string. - ParseSubtargetFeatures(FS, CPUName); + ParseSubtargetFeatures(CPUName, FS); // Initialize scheduling itinerary for the specified CPU. InstrItins = getInstrItineraryForCPU(CPUName); diff --git a/lib/Target/Mips/MipsSubtarget.h b/lib/Target/Mips/MipsSubtarget.h index ae76470f5e..533d4afe07 100644 --- a/lib/Target/Mips/MipsSubtarget.h +++ b/lib/Target/Mips/MipsSubtarget.h @@ -22,6 +22,7 @@ #include "MipsGenSubtargetInfo.inc" namespace llvm { +class StringRef; class MipsSubtarget : public MipsGenSubtargetInfo { @@ -99,7 +100,7 @@ public: /// ParseSubtargetFeatures - Parses features string setting specified /// subtarget options. Definition of function is auto generated by tblgen. - void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU); + void ParseSubtargetFeatures(StringRef CPU, StringRef FS); bool isMips1() const { return MipsArchVersion == Mips1; } bool isMips32() const { return MipsArchVersion >= Mips32; } diff --git a/lib/Target/PTX/PTXSubtarget.cpp b/lib/Target/PTX/PTXSubtarget.cpp index 5eff24a2b0..846eee1792 100644 --- a/lib/Target/PTX/PTXSubtarget.cpp +++ b/lib/Target/PTX/PTXSubtarget.cpp @@ -23,7 +23,7 @@ using namespace llvm; PTXSubtarget::PTXSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool is64Bit) - : PTXGenSubtargetInfo(), + : PTXGenSubtargetInfo(TT, CPU, FS), PTXTarget(PTX_COMPUTE_1_0), PTXVersion(PTX_VERSION_2_0), SupportsDouble(false), @@ -32,7 +32,7 @@ PTXSubtarget::PTXSubtarget(const std::string &TT, const std::string &CPU, std::string TARGET = CPU; if (TARGET.empty()) TARGET = "generic"; - ParseSubtargetFeatures(FS, TARGET); + ParseSubtargetFeatures(TARGET, FS); } std::string PTXSubtarget::getTargetString() const { diff --git a/lib/Target/PTX/PTXSubtarget.h b/lib/Target/PTX/PTXSubtarget.h index 913f0a2da3..0921f1f22c 100644 --- a/lib/Target/PTX/PTXSubtarget.h +++ b/lib/Target/PTX/PTXSubtarget.h @@ -20,6 +20,8 @@ #include "PTXGenSubtargetInfo.inc" namespace llvm { +class StringRef; + class PTXSubtarget : public PTXGenSubtargetInfo { public: @@ -112,8 +114,7 @@ namespace llvm { (PTXTarget >= PTX_COMPUTE_2_0 && PTXTarget < PTX_LAST_COMPUTE); } - void ParseSubtargetFeatures(const std::string &FS, - const std::string &CPU); + void ParseSubtargetFeatures(StringRef CPU, StringRef FS); }; // class PTXSubtarget } // namespace llvm diff --git a/lib/Target/PowerPC/PPCSubtarget.cpp b/lib/Target/PowerPC/PPCSubtarget.cpp index 75ee1c0990..7eeeaf59ec 100644 --- a/lib/Target/PowerPC/PPCSubtarget.cpp +++ b/lib/Target/PowerPC/PPCSubtarget.cpp @@ -64,7 +64,7 @@ static const char *GetCurrentPowerPCCPU() { PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool is64Bit) - : PPCGenSubtargetInfo() + : PPCGenSubtargetInfo(TT, CPU, FS) , StackAlignment(16) , DarwinDirective(PPC::DIR_NONE) , IsGigaProcessor(false) @@ -88,7 +88,7 @@ PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &CPU, #endif // Parse features string. - ParseSubtargetFeatures(FS, CPUName); + ParseSubtargetFeatures(CPUName, FS); // Initialize scheduling itinerary for the specified CPU. InstrItins = getInstrItineraryForCPU(CPUName); diff --git a/lib/Target/PowerPC/PPCSubtarget.h b/lib/Target/PowerPC/PPCSubtarget.h index c89f922a5b..e028de6b09 100644 --- a/lib/Target/PowerPC/PPCSubtarget.h +++ b/lib/Target/PowerPC/PPCSubtarget.h @@ -26,6 +26,7 @@ #undef PPC namespace llvm { +class StringRef; namespace PPC { // -m directive values. @@ -80,8 +81,7 @@ public: /// ParseSubtargetFeatures - Parses features string setting specified /// subtarget options. Definition of function is auto generated by tblgen. - void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU); - + void ParseSubtargetFeatures(StringRef CPU, StringRef FS); /// SetJITMode - This is called to inform the subtarget info that we are /// producing code for the JIT. diff --git a/lib/Target/Sparc/SparcSubtarget.cpp b/lib/Target/Sparc/SparcSubtarget.cpp index ee3cc03f13..c8281ceaaf 100644 --- a/lib/Target/Sparc/SparcSubtarget.cpp +++ b/lib/Target/Sparc/SparcSubtarget.cpp @@ -22,7 +22,7 @@ using namespace llvm; SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool is64Bit) : - SparcGenSubtargetInfo(), + SparcGenSubtargetInfo(TT, CPU, FS), IsV9(false), V8DeprecatedInsts(false), IsVIS(false), @@ -39,5 +39,5 @@ SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &CPU, IsV9 = CPUName == "v9"; // Parse features string. - ParseSubtargetFeatures(FS, CPUName); + ParseSubtargetFeatures(CPUName, FS); } diff --git a/lib/Target/Sparc/SparcSubtarget.h b/lib/Target/Sparc/SparcSubtarget.h index 257f22ad46..00a04c3bea 100644 --- a/lib/Target/Sparc/SparcSubtarget.h +++ b/lib/Target/Sparc/SparcSubtarget.h @@ -21,6 +21,7 @@ #include "SparcGenSubtargetInfo.inc" namespace llvm { +class StringRef; class SparcSubtarget : public SparcGenSubtargetInfo { bool IsV9; @@ -38,7 +39,7 @@ public: /// ParseSubtargetFeatures - Parses features string setting specified /// subtarget options. Definition of function is auto generated by tblgen. - void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU); + void ParseSubtargetFeatures(StringRef CPU, StringRef FS); bool is64Bit() const { return Is64Bit; } std::string getDataLayout() const { diff --git a/lib/Target/SystemZ/SystemZSubtarget.cpp b/lib/Target/SystemZ/SystemZSubtarget.cpp index 4388109fb1..518c09f260 100644 --- a/lib/Target/SystemZ/SystemZSubtarget.cpp +++ b/lib/Target/SystemZ/SystemZSubtarget.cpp @@ -26,13 +26,13 @@ using namespace llvm; SystemZSubtarget::SystemZSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS): - SystemZGenSubtargetInfo(), HasZ10Insts(false) { + SystemZGenSubtargetInfo(TT, CPU, FS), HasZ10Insts(false) { std::string CPUName = CPU; if (CPUName.empty()) CPUName = "z9"; // Parse features string. - ParseSubtargetFeatures(FS, CPUName); + ParseSubtargetFeatures(CPUName, FS); } /// True if accessing the GV requires an extra load. diff --git a/lib/Target/SystemZ/SystemZSubtarget.h b/lib/Target/SystemZ/SystemZSubtarget.h index 6ac606a53c..55cfd80002 100644 --- a/lib/Target/SystemZ/SystemZSubtarget.h +++ b/lib/Target/SystemZ/SystemZSubtarget.h @@ -22,6 +22,7 @@ namespace llvm { class GlobalValue; +class StringRef; class TargetMachine; class SystemZSubtarget : public SystemZGenSubtargetInfo { @@ -35,7 +36,7 @@ public: /// ParseSubtargetFeatures - Parses features string setting specified /// subtarget options. Definition of function is auto generated by tblgen. - void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU); + void ParseSubtargetFeatures(StringRef CPU, StringRef FS); bool isZ10() const { return HasZ10Insts; } diff --git a/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp b/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp index f24c356fc7..0f6b579ace 100644 --- a/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp +++ b/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp @@ -40,9 +40,10 @@ MCRegisterInfo *createX86MCRegisterInfo() { return X; } -MCSubtargetInfo *createX86MCSubtargetInfo() { +MCSubtargetInfo *createX86MCSubtargetInfo(StringRef TT, StringRef CPU, + StringRef FS) { MCSubtargetInfo *X = new MCSubtargetInfo(); - InitX86MCSubtargetInfo(X); + InitX86MCSubtargetInfo(X, CPU, FS); return X; } diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp index a1e6d7be98..1c1a10d56f 100644 --- a/lib/Target/X86/X86Subtarget.cpp +++ b/lib/Target/X86/X86Subtarget.cpp @@ -292,7 +292,7 @@ void X86Subtarget::AutoDetectSubtargetFeatures() { X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool is64Bit, unsigned StackAlignOverride) - : X86GenSubtargetInfo() + : X86GenSubtargetInfo(TT, CPU, FS) , PICStyle(PICSty |