diff options
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMInstrNEON.td | 52 |
1 files changed, 26 insertions, 26 deletions
diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index 9415b40e76..8641d6274a 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -135,45 +135,45 @@ def VSTRQ : NI<(outs), (ins QPR:$src, GPR:$addr), class VLD1D<string OpcodeStr, ValueType Ty, Intrinsic IntOp> : NLdSt<(outs DPR:$dst), (ins addrmode6:$addr), !strconcat(OpcodeStr, "\t${dst:dregsingle}, $addr"), - [(set DPR:$dst, (Ty (IntOp addrmode6:$addr, 1)))]>; + [(set DPR:$dst, (Ty (IntOp addrmode6:$addr)))]>; class VLD1Q<string OpcodeStr, ValueType Ty, Intrinsic IntOp> : NLdSt<(outs QPR:$dst), (ins addrmode6:$addr), !strconcat(OpcodeStr, "\t${dst:dregpair}, $addr"), - [(set QPR:$dst, (Ty (IntOp addrmode6:$addr, 1)))]>; + [(set QPR:$dst, (Ty (IntOp addrmode6:$addr)))]>; -def VLD1d8 : VLD1D<"vld1.8", v8i8, int_arm_neon_vldi>; -def VLD1d16 : VLD1D<"vld1.16", v4i16, int_arm_neon_vldi>; -def VLD1d32 : VLD1D<"vld1.32", v2i32, int_arm_neon_vldi>; -def VLD1df : VLD1D<"vld1.32", v2f32, int_arm_neon_vldf>; -def VLD1d64 : VLD1D<"vld1.64", v1i64, int_arm_neon_vldi>; +def VLD1d8 : VLD1D<"vld1.8", v8i8, int_arm_neon_vld1i>; +def VLD1d16 : VLD1D<"vld1.16", v4i16, int_arm_neon_vld1i>; +def VLD1d32 : VLD1D<"vld1.32", v2i32, int_arm_neon_vld1i>; +def VLD1df : VLD1D<"vld1.32", v2f32, int_arm_neon_vld1f>; +def VLD1d64 : VLD1D<"vld1.64", v1i64, int_arm_neon_vld1i>; -def VLD1q8 : VLD1Q<"vld1.8", v16i8, int_arm_neon_vldi>; -def VLD1q16 : VLD1Q<"vld1.16", v8i16, int_arm_neon_vldi>; -def VLD1q32 : VLD1Q<"vld1.32", v4i32, int_arm_neon_vldi>; -def VLD1qf : VLD1Q<"vld1.32", v4f32, int_arm_neon_vldf>; -def VLD1q64 : VLD1Q<"vld1.64", v2i64, int_arm_neon_vldi>; +def VLD1q8 : VLD1Q<"vld1.8", v16i8, int_arm_neon_vld1i>; +def VLD1q16 : VLD1Q<"vld1.16", v8i16, int_arm_neon_vld1i>; +def VLD1q32 : VLD1Q<"vld1.32", v4i32, int_arm_neon_vld1i>; +def VLD1qf : VLD1Q<"vld1.32", v4f32, int_arm_neon_vld1f>; +def VLD1q64 : VLD1Q<"vld1.64", v2i64, int_arm_neon_vld1i>; // VST1 : Vector Store (multiple single elements) class VST1D<string OpcodeStr, ValueType Ty, Intrinsic IntOp> : NLdSt<(outs), (ins addrmode6:$addr, DPR:$src), !strconcat(OpcodeStr, "\t${src:dregsingle}, $addr"), - [(IntOp addrmode6:$addr, (Ty DPR:$src), 1)]>; + [(IntOp addrmode6:$addr, (Ty DPR:$src))]>; class VST1Q<string OpcodeStr, ValueType Ty, Intrinsic IntOp> : NLdSt<(outs), (ins addrmode6:$addr, QPR:$src), !strconcat(OpcodeStr, "\t${src:dregpair}, $addr"), - [(IntOp addrmode6:$addr, (Ty QPR:$src), 1)]>; - -def VST1d8 : VST1D<"vst1.8", v8i8, int_arm_neon_vsti>; -def VST1d16 : VST1D<"vst1.16", v4i16, int_arm_neon_vsti>; -def VST1d32 : VST1D<"vst1.32", v2i32, int_arm_neon_vsti>; -def VST1df : VST1D<"vst1.32", v2f32, int_arm_neon_vstf>; -def VST1d64 : VST1D<"vst1.64", v1i64, int_arm_neon_vsti>; - -def VST1q8 : VST1Q<"vst1.8", v16i8, int_arm_neon_vsti>; -def VST1q16 : VST1Q<"vst1.16", v8i16, int_arm_neon_vsti>; -def VST1q32 : VST1Q<"vst1.32", v4i32, int_arm_neon_vsti>; -def VST1qf : VST1Q<"vst1.32", v4f32, int_arm_neon_vstf>; -def VST1q64 : VST1Q<"vst1.64", v2i64, int_arm_neon_vsti>; + [(IntOp addrmode6:$addr, (Ty QPR:$src))]>; + +def VST1d8 : VST1D<"vst1.8", v8i8, int_arm_neon_vst1i>; +def VST1d16 : VST1D<"vst1.16", v4i16, int_arm_neon_vst1i>; +def VST1d32 : VST1D<"vst1.32", v2i32, int_arm_neon_vst1i>; +def VST1df : VST1D<"vst1.32", v2f32, int_arm_neon_vst1f>; +def VST1d64 : VST1D<"vst1.64", v1i64, int_arm_neon_vst1i>; + +def VST1q8 : VST1Q<"vst1.8", v16i8, int_arm_neon_vst1i>; +def VST1q16 : VST1Q<"vst1.16", v8i16, int_arm_neon_vst1i>; +def VST1q32 : VST1Q<"vst1.32", v4i32, int_arm_neon_vst1i>; +def VST1qf : VST1Q<"vst1.32", v4f32, int_arm_neon_vst1f>; +def VST1q64 : VST1Q<"vst1.64", v2i64, int_arm_neon_vst1i>; //===----------------------------------------------------------------------===// |