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-rw-r--r--lib/Target/ARM/ARMBaseInstrInfo.cpp16
1 files changed, 0 insertions, 16 deletions
diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 315ddcbc7e..864c5f9dbb 100644
--- a/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -1352,20 +1352,6 @@ AnalyzeCompare(const MachineInstr *MI, unsigned &SrcReg, int &CmpValue) const {
SrcReg = MI->getOperand(0).getReg();
CmpValue = MI->getOperand(1).getImm();
return true;
- case ARM::TSTri: {
- if (&*MI->getParent()->begin() == MI)
- return false;
- const MachineInstr *AND = llvm::prior(MI);
- if (AND->getOpcode() != ARM::ANDri)
- return false;
- if (MI->getOperand(0).getReg() == AND->getOperand(1).getReg() &&
- MI->getOperand(1).getImm() == AND->getOperand(2).getImm()) {
- SrcReg = AND->getOperand(0).getReg();
- CmpValue = 0;
- return true;
- }
- }
- break;
}
return false;
@@ -1415,8 +1401,6 @@ OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpValue,
switch (MI->getOpcode()) {
default: break;
case ARM::ADDri:
- case ARM::ANDri:
- case ARM::t2ANDri:
case ARM::SUBri:
case ARM::t2ADDri:
case ARM::t2SUBri: