1 files changed, 11 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index f065400dfb..69f060965c 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -394,6 +394,7 @@ MipsTargetLowering(MipsTargetMachine &TM)
   if (Subtarget->isTargetNaCl()) {
     setOperationAction(ISD::NACL_TP_TLS_OFFSET,        MVT::i32, Custom);
     setOperationAction(ISD::NACL_TP_TDB_OFFSET,        MVT::i32, Custom);
+    setOperationAction(ISD::NACL_TARGET_ARCH,          MVT::i32, Custom);
   }
   // @LOCALMOD-END
 
@@ -762,6 +763,7 @@ LowerOperation(SDValue Op, SelectionDAG &DAG) const
   // @LOCALMOD-BEGIN
   case ISD::NACL_TP_TLS_OFFSET: return LowerNaClTpTlsOffset(Op, DAG);
   case ISD::NACL_TP_TDB_OFFSET: return LowerNaClTpTdbOffset(Op, DAG);
+  case ISD::NACL_TARGET_ARCH:   return LowerNaClTargetArch(Op, DAG);
   // @LOCALMOD-END
   }
   return SDValue();
@@ -1516,6 +1518,15 @@ SDValue MipsTargetLowering::LowerNaClTpTdbOffset(SDValue Op,
 		     Op.getOperand(0));
 }
 
+SDValue
+MipsTargetLowering::LowerNaClTargetArch(SDValue Op, SelectionDAG &DAG) const {
+  // size_t __nacl_target_arch () {
+  //   return PnaclTargetArchitectureMips_32;
+  // }
+  return DAG.getConstant(PnaclTargetArchitectureMips_32,
+                         Op.getValueType().getSimpleVT());
+}
+
 SDValue MipsTargetLowering::
 GetNaClThreadPointer(SelectionDAG &DAG, DebugLoc DL) const {
   EVT PtrVT = getPointerTy();