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Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
-rw-r--r--lib/Target/ARM/Disassembler/ARMDisassembler.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index b5adc4977e..240293a2e6 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -2491,6 +2491,7 @@ static bool DecodeDoubleRegExclusive(llvm::MCInst &Inst, unsigned Insn,
unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
unsigned Rt = fieldFromInstruction32(Insn, 0, 4);
unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
+ unsigned pred = fieldFromInstruction32(Insn, 28, 4);
if (Inst.getOpcode() == ARM::STREXD)
if (!DecoderGPRRegisterClass(Inst, Rd, Address, Decoder)) return false;
@@ -2501,6 +2502,7 @@ static bool DecodeDoubleRegExclusive(llvm::MCInst &Inst, unsigned Insn,
if (!DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)) return false;
if (!DecodeGPRRegisterClass(Inst, Rt+1, Address, Decoder)) return false;
if (!DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)) return false;
+ if (!DecodePredicateOperand(Inst, pred, Address, Decoder)) return false;
return true;
}