diff options
Diffstat (limited to 'lib/Target/ARM/ARMSubtarget.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMSubtarget.cpp | 24 |
1 files changed, 23 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMSubtarget.cpp b/lib/Target/ARM/ARMSubtarget.cpp index 2766e7b1b5..f5ea64d42b 100644 --- a/lib/Target/ARM/ARMSubtarget.cpp +++ b/lib/Target/ARM/ARMSubtarget.cpp @@ -24,13 +24,22 @@ using namespace llvm; -static cl::opt<bool> +cl::opt<bool> // @LOCALMOD ReserveR9("arm-reserve-r9", cl::Hidden, cl::desc("Reserve R9, making it unavailable as GPR")); static cl::opt<bool> DarwinUseMOVT("arm-darwin-use-movt", cl::init(true), cl::Hidden); +// @LOCALMOD-START +// TODO: * JITing has not been tested at all +// * Thumb mode operation is also not clear: it seems jump tables +// for thumb are broken independent of this option +static cl::opt<bool> +NoInlineJumpTables("no-inline-jumptables", + cl::desc("Do not place jump tables inline in the code")); +// @LOCALMOD-END + static cl::opt<bool> UseFusedMulOps("arm-use-mulops", cl::init(true), cl::Hidden); @@ -64,6 +73,7 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU, , NoARM(false) , PostRAScheduler(false) , IsR9Reserved(ReserveR9) + , UseInlineJumpTables(!NoInlineJumpTables) // @LOCALMOD , UseMovt(false) , SupportsTailCall(false) , HasFP16(false) @@ -126,6 +136,18 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU, SupportsTailCall = !getTargetTriple().isOSVersionLT(5, 0); } + // @LOCALMOD-BEGIN + // Advanced SIMD and Q registers are part of the NaCl ARM ABI. The ARM + // EABI specifies only an 8 byte alignment, which can result in poor + // performance for these 16 byte data types if they straddle cache lines, etc. + // Therefore, NaCl aligns stack frames 0mod16. + if (isTargetNaCl()) + stackAlignment = 16; + // NaCl uses MovT to avoid generating constant islands. + if (isTargetNaCl() && !useConstPool()) + UseMovt = true; + // @LOCALMOD-END + if (!isThumb() || hasThumb2()) PostRAScheduler = true; |